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Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip.

Pai-Yu Chen, Deepak Kadetotad, Zihan Xu, Abinash Mohanty, Binbin Lin, Jieping Ye, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao, Shimeng Yu

VenueADATE
Year2015
ProceedingsDATE

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