An automatic RTL compiler for high-throughput FPGA implementation of diverse deep convolutional neural networks.
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
Browse the full FPL paper archive.
Yufei Ma, Yu Cao, Sarma B. K. Vrudhula, Jae-sun Seo
Browse the full FPL paper archive.