High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA.
Panu Sjovall, Vili Viitamki, Jarno Vanne, Timo D. Hmlinen
Browse the full ICASSP paper archive.
Panu Sjovall, Vili Viitamki, Jarno Vanne, Timo D. Hmlinen
Browse the full ICASSP paper archive.