Automatic Test Plan Generation for Analog Integrated Circuits - A Practical Approach.
Ravindranath Naiknaware, G. N. Nandakumar, Rajeev Arora, John Larkin
Browse the full VLSID paper archive.
Ravindranath Naiknaware, G. N. Nandakumar, Rajeev Arora, John Larkin
Browse the full VLSID paper archive.