G. N. Nandakumar
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
2
Active years
1993–2005
Best venue rank
National
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2005 | VLSID | Application of Douglas-Peucker Algorithm to Generate Compact but Accurate IBIS Models. | G. N. Nandakumar, Nirav Patel, Raghunatha Reddy, Makeshwar Kothandaraman |
| 2004 | VLSID | An Efficient Method to Generate Test Vectors for Combinational Cell Verification. | Nirav Patel, M. Srihari, Pooja Maheswari, G. N. Nandakumar |
| 1998 | VLSID | False Path Detection at Transistor Level. | Abhijit Das, Samrat Sen, Mohan Rangan, Rupesh Nayak, G. N. Nandakumar |
| 1993 | ITC | Automatic Test Plan Generation for Analog and Mixed Signal Integrated Circuits using Partial Activation and High Level Simulation. | Ravindranath Naiknaware, G. N. Nandakumar, Srinivasa Rao Kasa |
| 1993 | VLSID | Automatic Test Plan Generation for Analog Integrated Circuits - A Practical Approach. | Ravindranath Naiknaware, G. N. Nandakumar, Rajeev Arora, John Larkin |