An asynchronous algorithm for sequential circuit test generation on a network of workstations.
James Sienicki, Michael L. Bushnell, Prathima Agrawal, Vishwani D. Agrawal
Browse the full VLSID paper archive.
James Sienicki, Michael L. Bushnell, Prathima Agrawal, Vishwani D. Agrawal
Browse the full VLSID paper archive.