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Abhijit Ghosh

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

21

Venues

9

Active years

1989–2024

Best venue rank

A*

Where they publish

Papers

21 indexed papers, newest first.

YearVenueTitleAuthors
2024SiggraphAA Plentoptic 3D Vision System.Agastya Kalra, Vage Taamazyan, Alberto Dall'olio, Raghav Khanna, Tomas Gerlich, Georgia Giannopolou, Guy Stoppi, Daniel Baxter, Abhijit Ghosh, Richard Szeliski, Kartik Venkataraman
2000ASPDACMethodology for hardware/software co-verification in C/C++ (short paper).Luc Smria, Abhijit Ghosh
2000VLSIDFormal Verification of Synthesized Mixed Signal Designs Using *BMDs.Abhijit Ghosh, Ranga Vemuri
1999DATEHardware Synthesis from C/C++.Abhijit Ghosh, Joachim Kunkel, Stan Y. Liao
1999ICCDFormal Verification of Synthesized Analog Designs.Abhijit Ghosh, Ranga Vemuri
1996ICCADAn observability-based code coverage metric for functional simulation.Srinivas Devadas, Abhijit Ghosh, Kurt Keutzer
1995ASPDACA hardware-software co-simulator for embedded system design and debugging.Abhijit Ghosh, Michael Bershteyn, Ross Casley, Chiahon Chien, Ankur Jain, Michael Lipsie, Donald Tarrodaychik, Osamu Yamamo
1994ICCADPrecomputation-based sequential logic optimization for low power.Mazhar Alidina, Jos Monteiro, Srinivas Devadas, Abhijit Ghosh, Marios C. Papaefthymiou
1993ICCADBoolean factorization using multiple-valued minimization.Stan Y. Liao, Srinivas Devadas, Abhijit Ghosh
1993ICCADRetiming sequential circuits for low power.Jos Monteiro, Srinivas Devadas, Abhijit Ghosh
1993ICCADProbabilistic construction and manipulation of free Boolean diagrams.Amelia Shen, Srinivas Devadas, Abhijit Ghosh
1992DACEstimation of Average Switching Activity in Combinational and Sequential Circuits.Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer, Jacob K. White
1992ICCADOn average power dissipation and random pattern testability of CMOS combinational logic networks.Amelia Shen, Abhijit Ghosh, Srinivas Devadas, Kurt Keutzer
1991ICCDBoolean Satisfiability and Equivalence Checking Using General Binary Decision Diagrams.Pranav Ashar, Abhijit Ghosh, Srinivas Devadas
1991VTSRecent progress in synthesis for testability.Srinivas Devadas, Kurt Keutzer, Abhijit Ghosh
1990DACVerification of Interacting Sequential Circuits.Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990DACSequential Test Generation at the Register-Transfer and Logic Levels.Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990ICCADImplicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test.Pranav Ashar, Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990ICCDHeuristic minimization of Boolean relations using testing techniques.Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1990ITCSequential logic synthesis for testability using register-transfer level descriptions.Abhijit Ghosh, Srinivas Devadas, A. Richard Newton
1989ICCADTest generation for highly sequential circuits.Abhijit Ghosh, Srinivas Devadas, A. Richard Newton