| 2011 | ITC | Generic, orthogonal and low-cost March Element based memory BIST. | Ad J. van de Goor, Said Hamdioui, Halil Kukner |
| 2010 | DATE | Memory testing with a RISC microcontroller. | Ad J. van de Goor, Georgi Gaydadjiev, Said Hamdioui |
| 2010 | DDECS | Using a CISC microcontroller to test embedded memories. | Ad J. van de Goor, Said Hamdioui, Georgi Gaydadjiev |
| 2010 | DDECS | Low-cost, customized and flexible SRAM MBIST engine. | Ad J. van de Goor, Christian Jung, Said Hamdioui, Georgi Gaydadjiev |
| 2010 | DDECS | Advanced embedded memory testing: Reducing the defect per million level at lower test cost. | Said Hamdioui, Ad J. van de Goor |
| 2008 | ITC | Defect Oriented Testing of the Strap Problem Under Process Variations in DRAMs. | Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georg Mueller |
| 2006 | DATE | Space of DRAM fault models and corresponding testing. | Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor |
| 2006 | ITC | DRAM-Specific Space of Memory Tests. | Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor, Georgi Gaydadjiev, Jrg E. Vollrath |
| 2005 | DATE | Framework for Fault Analysis and Test Generation in DRAMs. | Zaid Al-Ars, Said Hamdioui, Georg Mueller, Ad J. van de Goor |
| 2004 | DATE | Soft Faults and the Importance of Stresses in Memory Testing. | Zaid Al-Ars, Ad J. van de Goor |
| 2004 | ETS | Tests for address decoder delay faults in RAMs due to inter-gate opens. | Ad J. van de Goor, Said Hamdioui, Zaid Al-Ars |
| 2004 | ITC | Detecting Faults in the Peripheral Circuits and an Evaluation of SRAM Tests. | Ad J. van de Goor, Said Hamdioui, Rob Wadsworth |
| 2004 | VTS | Effects of Bit Line Coupling on the Faulty Behavior of DRAMs. | Zaid Al-Ars, Said Hamdioui, Ad J. van de Goor |
| 2003 | DATE | Optimizing Stresses for Testing DRAM Cell Defects Using Electrical Simulation. | Zaid Al-Ars, Ad J. van de Goor, Jens Braun, Detlev Richter |
| 2003 | DATE | Consequences of RAM Bitline Twisting for Test Coverage. | Ivo Schanstra, Ad J. van de Goor |
| 2003 | ETS | TPI for improving PR fault coverage of Boolean and three-state circuits. | M. J. Geuzebroek, Ad J. van de Goor |
| 2003 | ETS | Importance of dynamic faults for new SRAM technologies. | Said Hamdioui, Rob Wadsworth, John Delos Reyes, Ad J. van de Goor |
| 2003 | VTS | Detecting Intra-Word Faults in Word-Oriented Memories. | Said Hamdioui, Ad J. van de Goor, Mike Rodgers |
| 2002 | DATE | Modeling Techniques and Tests for Partial Faults in Memory Devices. | Zaid Al-Ars, Ad J. van de Goor |
| 2002 | DATE | Minimal Test for Coupling Faults in Word-Oriented Memories. | Ad J. van de Goor, Magdy S. Abadir, Alan Carlin |
| 2002 | ITC | Test Point Insertion that Facilitates ATPG in Reducing Test Time and Data Volume. | M. J. Geuzebroek, J. Th. van der Linden, Ad J. van de Goor |
| 2002 | VTS | Approximating Infinite Dynamic Behavior for DRAM Cell Defects. | Zaid Al-Ars, Ad J. van de Goor |
| 2002 | VTS | Testing Static and Dynamic Faults in Random Access Memories. | Said Hamdioui, Zaid Al-Ars, Ad J. van de Goor |
| 2001 | DATE | Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs. | Zaid Al-Ars, Ad J. van de Goor |
| 2001 | ITC | Simulation based analysis of temperature effect on the faulty behavior of embedded DRAMs. | Zaid Al-Ars, Ad J. van de Goor, Jens Braun, Detlev Richter |
| 2000 | ITC | Test point insertion for compact test sets. | M. J. Geuzebroek, J. Th. van der Linden, Ad J. van de Goor |
| 2000 | ITC | Industrial evaluation of DRAM SIMM tests. | Ad J. van de Goor, A. Paalvast |
| 2000 | VTS | Functional Memory Faults: A Formal Notation and a Taxonomy. | Ad J. van de Goor, Zaid Al-Ars |
| 1999 | DATE | Industrial Evaluation of DRAM Tests. | Ad J. van de Goor, J. de Neef |
| 1999 | DATE | Illegal State Space Identification for Sequential Circuit Test Generation. | M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1999 | ITC | Industrial evaluation of stress combinations for march tests applied to SRAMs. | Ad J. van de Goor, Ivo Schanstra |
| 1999 | ITC | Port interference faults in two-port memories. | Said Hamdioui, Ad J. van de Goor |
| 1999 | ITC | Testability of the Philips 80C51 micro-controller. | M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1998 | DATE | March Tests for Word-Oriented Memories. | Ad J. van de Goor, Issam B. S. Tlili |
| 1998 | ITC | Consequences of port restrictions on testing two-port memories. | Said Hamdioui, Ad J. van de Goor |
| 1998 | ITC | Semiconductor manufacturing process monitoring using built-in self-test for embedded memories. | Ivo Schanstra, Dharmajaya Lukita, Ad J. van de Goor, Kees Veelenturf, Paul J. van Wijnen |
| 1998 | VTS | Fault Models and Tests for Two-Port Memories. | Ad J. van de Goor, Said Hamdioui |
| 1997 | DATE | March LA: a test for linked memory faults. | Ad J. van de Goor, Georgi Gaydadjiev, Vyacheslav N. Yarmolik, V. G. Mikitjuk |
| 1997 | ITC | The Implementation of Pseudo-Random Memory Tests on Commercial Memory Testers. | Ad J. van de Goor, Mike Lin |
| 1997 | ITC | Sequential Test Generation with Advanced Illegal State Search. | M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1997 | VTS | Disturb Neighborhood Pattern Sensitive Fault. | Ad J. van de Goor, Issam B. S. Tlili |
| 1996 | DATE | Towards a Uniform Notation for Memory Tests. | Ad J. van de Goor, Aad Offerman, Ivo Schanstra |
| 1996 | DATE | RAM Testing Algorithm for Detection Linked Coupling Faults. | V. G. Mikitjuk, V. N. Yarmolik, Ad J. van de Goor |
| 1996 | ITC | Accelerated Compact Test Set Generation for Three-State Circuits. | M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1996 | VTS | March LR: a test for realistic linked faults. | Ad J. van de Goor, Georgi Gaydadjiev, V. G. Mikitjuk, Vyacheslav N. Yarmolik |
| 1995 | DATE | Functional test for shifting-type FIFOs. | Ad J. van de Goor, Ivo Schanstra, Yervant Zorian |
| 1995 | DATE | Pseudo-exhaustive word-oriented DRAM testing. | Mark G. Karpovsky, Ad J. van de Goor, V. N. Yarmolik |
| 1995 | ITC | Coping with Re-usability Using Sequential ATPG: A Practical Case Study. | Jos van Sas, Erik Huyskens, Hans Naert, Fred Schell, Ad J. van de Goor |
| 1995 | VTS | Compact test sets for industrial circuits. | M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1994 | ISCAS | A 16x16-bit Static CMOS Wave-Pipelined Multiplier. | Fabian Klass, Michael J. Flynn, Ad J. van de Goor |
| 1994 | ITC | Generating March Tests Automatically. | Ad J. van de Goor, B. Smit |
| 1994 | ITC | Parallel Pattern Fast Fault Simulation for Three-State Circuits and Bidirectional I/O. | J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor |
| 1994 | ITC | An Effective BIST Scheme for Ring-Address Type FIFOs. | Yervant Zorian, Ad J. van de Goor, Ivo Schanstra |
| 1994 | VTS | Automating the verification of memory tests. | Ad J. van de Goor, B. Smit |
| 1994 | VTS | Fault models and tests for Ring Address Type FIFOs. | Ad J. van de Goor, Ivo Schanstra, Yervant Zorian |
| 1994 | VTS | Test generation and three-state elements, buses, and bidirectionals. | J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor |
| 1993 | ITC | Test Pattern Generation with Restrictors. | M. H. Konijnenburg, J. Th. van der Linden, Ad J. van de Goor |
| 1992 | ITC | Functional Testing of Current Microprocessors (applied to the Intel i860 | Ad J. van de Goor, Th. J. W. Verhallen |
| 1991 | ICCD | Logic Synthesis of 100-percent Testable Logic Networks. | Gert-Jan Tromp, Ad J. van de Goor |
| 1991 | ITC | Locating Bridging Faults in Memory Arrays. | Ad J. van de Goor, P. C. M. van der Arend, Gert-Jan Tromp |
| 1989 | MICRO | DOAS: an object oriented architecture supporting secure languages. | Ad J. van de Goor, Henk Corporaal |
| 1988 | USENIX | UNIX I/O in a Multiprocessor System. | Ad J. van de Goor, A. Moolenaar |