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Alex K. Jones

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

54

Venues

21

Active years

2000–2026

Best venue rank

A*

Where they publish

Papers

54 indexed papers, newest first.

YearVenueTitleAuthors
2026HPCACount2Multiply: Reliable In-Memory High-Radix Counting.Joo Paulo C. de Lima, Benjamin F. Morris III, Asif Ali Khan, Jernimo Castrilln, Alex K. Jones
2026HPCANP-CAM: Efficient and Scalable DNA Classification using a NoC-Partitioned CAM Architecture.Benjamin F. Morris III, Tergel Molom-Ochir, Changchun Zhou, Yiran Chen, Alex K. Jones, Hai Li
2026ISCAKernpiler: Compiler Optimization for Quantum Hamiltonian Simulation with Partial Trotterization.Ethan Decker, Lucas Goetz, Evan McKinney, Erik Gustafson, Junyu Zhou, Yuhao Liu, Alex K. Jones, Ang Li, Alexander Schuckert, Samuel A. Stein, Eleanor Crane, Gushu Li
2025FPGATowards Accelerator Customization in Real-time Safety-critical Systems.Shixin Ji, Xingzhen Chen, Wei Zhang, Zhuoping Yang, Jinming Zhuang, Sarah Schultz, Yukai Song, Jingtong Hu, Alex K. Jones, Zheng Dong, Peipei Zhou
2025QCESymbolic Hamiltonian Compiler for Hybrid Qubit-Boson Processors.Ethan Decker, Erik Gustafson, Evan McKinney, Alex K. Jones, Lucas Goetz, Ang Li, Alexander Schuckert, Samuel A. Stein, Gushu Li, Eleanor Crane
2025SCAGILE: Lightweight and Efficient Asynchronous GPU-SSD Integration.Zhuoping Yang, Jinming Zhuang, Xingzhen Chen, Alex K. Jones, Peipei Zhou
2025RTSSDERCA: DetERministic Cycle-Level Accelerator on Reconfigurable Platforms in DNN-Enabled Real-Time Safety-Critical Systems.Shixin Ji, Zhuoping Yang, Xingzhen Chen, Wei Zhang, Jinming Zhuang, Alex K. Jones, Zheng Dong, Peipei Zhou
2024FPGASSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration.Jinming Zhuang, Zhuoping Yang, Shixin Ji, Heng Huang, Alex K. Jones, Jingtong Hu, Yiyu Shi, Peipei Zhou
2024HPCAMIRAGE: Quantum Circuit Decomposition and Routing Collaborative Design Using Mirror Gates.Evan McKinney, Michael Hatridge, Alex K. Jones
2023FPGACHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture.Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex K. Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou
2023HPCACo-Designed Architectures for Modular Superconducting Quantum Computers.Evan McKinney, Mingkang Xia, Chao Zhou, Pinlei Lu, Michael Hatridge, Alex K. Jones
2023HPCARealizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance.Jiangwei Zhang, Chong Wang, Zhenhua Zhu, Donald Kline, Alex K. Jones, Huazhong Yang, Yu Wang
2023ICCADAIM: Accelerating Arbitrary-Precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP.Zhuoping Yang, Jinming Zhuang, Jiaqi Yin, Cunxi Yu, Alex K. Jones, Peipei Zhou
2023ISCAParallel Driving for Fast Quantum Computing Under Speed Limits.Evan McKinney, Chao Zhou, Mingkang Xia, Michael Hatridge, Alex K. Jones
2022DACH2H: heterogeneous model to heterogeneous system mapping with computation and communication awareness.Xinyi Zhang, Cong Hao, Peipei Zhou, Alex K. Jones, Jingtong Hu
2022HPCAVirtual Coset Coding for Encrypted Non-Volatile Memories with Multi-Level Cells.Stephen Longofono, Seyed Mohammad Seyedzadeh, Alex K. Jones
2022MICROCORUSCANT: Fast Efficient Processing-in-Racetrack Memories.Sbastien Ollivier, Stephen Longofono, Prayash Dutta, Jingtong Hu, Sanjukta Bhanja, Alex K. Jones
2020HPCAFLOWER and FaME: A Low Overhead Bit-Level Fault-map and Fault-Tolerance Approach for Deeply Scaled Memories.Donald Kline Jr., Jiangwei Zhang, Rami G. Melhem, Alex K. Jones
2019DSNLeveraging Transverse Reads to Correct Alignment Faults in Domain Wall Memories.Sbastien Ollivier, Donald Kline Jr., Kawsher A. Roxy, Rami G. Melhem, Sanjukta Bhanja, Alex K. Jones
2019MASCOTSPREMSim: A Resilience Framework for Modeling Traditional and Emerging Memory Reliability.Donald Kline Jr., Stephen Longofono, Sbastien Ollivier, Erin Higgins, Rami G. Melhem, Alex K. Jones
2018HPCAEnabling Fine-Grain Restricted Coset Coding Through Word-Level Compression for PCM.Seyed Mohammad Seyedzadeh, Alex K. Jones, Rami G. Melhem
2018ISCAMitigating Wordline Crosstalk Using Adaptive Trees of Counters.Seyed Mohammad Seyedzadeh, Alex K. Jones, Rami G. Melhem
2017ICCADDynamic partitioning to mitigate stuck-at faults in emerging memories.Jiangwei Zhang, Donald Kline Jr., Liang Fang, Rami G. Melhem, Alex K. Jones
2017ICCDYoda: Judge Me by My Size, Do You?Jiangwei Zhang, Donald Kline Jr., Liang Fang, Rami G. Melhem, Alex K. Jones
2016DSNLeveraging ECC to Mitigate Read Disturbance, False Reads and Write Faults in STT-RAM.Seyed Mohammad Seyedzadeh, Rakan Maddah, Alex K. Jones, Rami G. Melhem
2015ASPDACMultilane Racetrack caches: Improving efficiency through compression and independent shifting.Haifeng Xu, Yong Li, Rami G. Melhem, Alex K. Jones
2015DACDomain-wall memory buffer for low-energy NoCs.Donald Kline Jr., Haifeng Xu, Rami G. Melhem, Alex K. Jones
2015DACPRES: pseudo-random encoding scheme to increase the bit flip reduction in the memory.Seyed Mohammad Seyedzadeh, Rakan Maddah, Alex K. Jones, Rami G. Melhem
2015ISPASSReciprocal abstraction for computer architecture co-simulation.Michael Moeng, Alex K. Jones, Rami G. Melhem
2014ASPDACSTD-TLB: A STT-RAM-based dynamically-configurable translation lookaside buffer for GPU architectures.Xiaoxiao Liu, Yong Li, Yaojun Zhang, Alex K. Jones, Yiran Chen
2014ASPDACPrefetching techniques for STT-RAM based last-level cache in CMP systems.Mengjie Mao, Guangyu Sun, Yong Li, Alex K. Jones, Yiran Chen
2014ISLPEDDesign exploration of racetrack lower-level caches.Zhenyu Sun, Xiuyuan Bi, Alex K. Jones, Hai Li
2014MASCOTSWeighted-Tuple Synchronization for Parallel Architecture Simulators.Michael Moeng, Rami G. Melhem, Alex K. Jones
2013DACProactive circuit allocation in multiplane NoCs.Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
2013ICCADConsidering fabrication in sustainable computing.Alex K. Jones, Yiran Chen, William O. Collinge, Haifeng Xu, Laura A. Schaefer, Amy E. Landis, Melissa M. Bilec
2012DATEAsymmetry of MTJ switching and its implication to STT-RAM designs.Yaojun Zhang, Xiaobin Wang, Yong Li, Alex K. Jones, Yiran Chen
2012ISLPEDA software approach for combating asymmetries of non-volatile memories.Yong Li, Yiran Chen, Alex K. Jones
2010DACAutomated modeling and emulation of interconnect designs for many-core chip multiprocessors.Colin J. Ihrig, Rami G. Melhem, Alex K. Jones
2009HOTIWinning with Pinning in NoC.Ahmed Abousamra, Rami G. Melhem, Alex K. Jones
2006DACAn automated, reconfigurable, low-power RFID tag.Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle
2006FCCMTechnology Mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM).Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones
2006FCCMA Field Programmable RFID Tag and Associated Design Flow.Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle
2006FCCMA Low-Energy Reconfigurable Fabric for the SuperCISC Architecture.Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones
2006ISCASA hybrid encoding scheme for efficient single-cycle range matching in content addressable memory.Ying Yu, Raymond R. Hoare, Alex K. Jones, Ralph Sprang
2006SCInterconnect routing and scheduling - Level-wise scheduling algorithm for fat tree interconnection networks.Zhu Ding, Raymond R. Hoare, Alex K. Jones, Rami G. Melhem
2006SCInterconnect routing and scheduling - A near-optimal real-time hardware scheduler for large cardinality crossbar switches.Raymond R. Hoare, Zhu Ding, Alex K. Jones
2005FCCMOptimizing Technology Mapping for FPGAs Using CAMs.Joshua M. Lucas, Raymond Hoare, Alex K. Jones
2005FPGAAn FPGA-based VLIW processor with custom hardware execution.Alex K. Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster
2005SCOn the Feasibility of Optical Circuit Switching for High Performance Computing Systems.Kevin J. Barker, Alan F. Benner, Raymond R. Hoare, Adolfy Hoisie, Alex K. Jones, Darren J. Kerbyson, Dan Li, Rami G. Melhem, Ramakrishnan Rajamony, Eugen Schenfeld, Shuyi Shao, Craig B. Stunkel, Peter Walker
2005VLSIDBehavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation.Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee
2003FCCMAn Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs.Alex K. Jones, Prithviraj Banerjee
2003FPGAAn automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs.Alex K. Jones, Prithviraj Banerjee
2002CASESPACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations.Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee
2000FCCMA MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems.Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky