Artur Jutman
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
30
Venues
11
Active years
2001–2026
Best venue rank
B
Where they publish
Papers
30 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ETS | NURSE: A Distributed Architecture for Runtime Fault Management in Processor Designs. | Ashwin Santhosh, Artur Jutman, Endri Kaja, Wolfgang Ecker, Maksim Jenihhin |
| 2026 | IOLTS | Scalable Reliability Assessment of Vision Transformers on Systolic Arrays via Fault Propagation Analysis. | Natalia Cherezova, Artur Jutman, Maksim Jenihhin |
| 2026 | VTS | Special Session: Reliability Assessment of DNN Models and Inference on Systolic Arrays. | Natalia Cherezova, Salvatore Pappalardo, Annachiara Ruospo, Bastien Deveautour, Lorenzo Fezza, Artur Jutman, Ernesto Snchez, Alberto Bosio, Matteo Sonza Reorda, Maksim Jenihhin |
| 2025 | ETS | European Test Symposium Teams: an Anniversary Snapshot. | Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilrd Enyedi, Iulia Stefan, Ovidiu Stan, Cosmina Corches, Zebo Peng, Petru Eles, Rolf Drechsler, S. Eggersgl, Grschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, Po-Yao Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, Stefano Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, Patrick Girard, Marcello Traiola, Arnaud Virazel, Fernando Fernandes dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letcia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, Fabian Luis Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, Anurup Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand |
| 2019 | DDECS | A new FPGA-based Detection Method for Spurious Variations in PCBA Power Distribution Network. | Sergei Odintsov, Ludovica Bozzoli, Corrado De Sio, Luca Sterpone, Artur Jutman |
| 2019 | ETS | Post-Silicon Validation of IEEE 1687 Reconfigurable Scan Networks. | Aleksa Damljanovic, Artur Jutman, Giovanni Squillero, Anton Tsertov |
| 2019 | ITC | Simulation-based Equivalence Checking between IEEE 1687 ICL and RTL. | Aleksa Damljanovic, Artur Jutman, Michele Portolan, Ernesto Snchez, Giovanni Squillero, Anton Tsertov |
| 2019 | ITC | IEEE European Test Symposium (ETS). | Stephan Eggersgl, Said Hamdioui, Artur Jutman, Maria K. Michael, Jaan Raik, Matteo Sonza Reorda, Mehdi Baradaran Tahoori, Elena-Ioana Vatajelu |
| 2017 | DATE | BASTION: Board and SoC test instrumentation for ageing and no failure found. | Artur Jutman, Christophe Lotz, Erik Larsson, Matteo Sonza Reorda, Maksim Jenihhin, Jaan Raik, Hans G. Kerkhoff, Rene Krenz-Baath, Piet Engelke |
| 2017 | ITC | Marginal PCB assembly defect detection on DDR3/4 memory bus. | Sergei Odintsov, Artur Jutman, Sergei Devadze |
| 2016 | ETS | On coverage of timing related faults at board level. | Artur Jutman, Igor Aleksejev, Sergei Devadze |
| 2016 | FDL | Designing reliable cyber-physical systems overview associated to the special session at FDL'16. | Gadi Aleksandrowicz, Eli Arbel, Roderick Bloem, Timon D. ter Braak, Sergei Devadze, Grschwin Fey, Maksim Jenihhin, Artur Jutman, Hans G. Kerkhoff, Robert Knighofer, Jan Malburg, Shiri Moran, Jaan Raik, Gerard K. Rauwerda, Heinz Riener, Franz Rck, Konstantin Shibin, Kim Sunesen, Jinbo Wan, Yong Zhao |
| 2016 | ITC | A suite of IEEE 1687 benchmark networks. | Anton Tsertov, Artur Jutman, Sergei Devadze, Matteo Sonza Reorda, Erik Larsson, Farrokh Ghani Zadegan, Riccardo Cantoro, Mehrdad Montazeri, Rene Krenz-Baath |
| 2015 | VTS | No Fault Found: The root cause. | Erik Larsson, Bill Eklow, Scott Davidsson, Rob Aitken, Artur Jutman, Christophe Lotz |
| 2012 | ETS | Re-using chip level DFT at board level. | Xinli Gu, Jeff Rearick, Bill Eklow, Martin Keim, Jun Qian, Artur Jutman, Krishnendu Chakrabarty, Erik Larsson |
| 2012 | ETS | Embedded synthetic instruments for Board-Level testing. | Artur Jutman, Sergei Devadze, Igor Aleksejev, Thomas Wenzel |
| 2012 | ITC | FPGA-based synthetic instrumentation for board test. | Igor Aleksejev, Artur Jutman, Sergei Devadze, Sergei Odintsov, Thomas Wenzel |
| 2011 | DSD | SoC and Board Modeling for Processor-Centric Board Testing. | Anton Tsertov, Raimund Ubar, Artur Jutman, Sergei Devadze |
| 2010 | DATE | Parallel X-fault simulation with critical path tracing technique. | Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2010 | DSD | Structurally Synthesized Multiple Input BDDs for Speeding Up Logic-Level Simulation of Digital Circuits. | Dmitri Mironov, Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2010 | ISCAS | Fault collapsing with linear complexity in digital circuits. | Raimund Ubar, Dmitri Mironov, Jaan Raik, Artur Jutman |
| 2009 | ITC | Fast extended test access via JTAG and FPGAs. | Sergei Devadze, Artur Jutman, Igor Aleksejev, Raimund Ubar |
| 2008 | ASPDAC | Parallel fault backtracing for calculation of fault coverage. | Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2008 | DDECS | Calculation of LFSR Seed and Polynomial Pair for BIST Applications. | Artur Jutman, Anton Tsertov, Raimund Ubar |
| 2007 | ETS | Ultra Fast Parallel Fault Analysis on Structurally Synthesized BDDs. | Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman |
| 2006 | DSD | Off-Line Testing of Delay Faults in NoC Interconnects. | Tomas Bengtsson, Artur Jutman, Shashi Kumar, Raimund Ubar, Zebo Peng |
| 2005 | DSD | An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform. | Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogubov |
| 2005 | EDCC | Efficient Single-Pattern Fault Simulation on Structurally Synthesized BDDs. | Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jutman |
| 2004 | ETS | At-speed on-chip diagnosis of board-level interconnect faults. | Artur Jutman |
| 2001 | DATE | Timing simulation of digital circuits with binary decision diagrams. | Raimund Ubar, Artur Jutman, Zebo Peng |