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Atsushi Takahashi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

36

Venues

13

Active years

1996–2025

Best venue rank

A*

Where they publish

Papers

36 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASGap Channel Routing with Fixed Wires.Masayuki Shimoda, Atsushi Takahashi, Kosuke Yanagidaira, Mikiko Hirai, Toshikazu Watanabe, Toshimitsu Iwasawa, Chikaaki Kodama
2024ISCASBCA Channel Routing to Minimize Wirelength for Generalized Channel Problem.Zezhong Wang, Masayuki Shimoda, Atsushi Takahashi
2021HCIA Smartphone User Verification Method Based on Finger-Writing of a Simple Symbol.Atsushi Takahashi, Yohei Masegi, Isao Nakanishi
2019ISCASA Low Area Overhead Design for High-Performance General-Synchronous Circuits with Speculative Execution.Shimpei Sato, Eijiro Sassa, Yuta Ukon, Atsushi Takahashi
2019SIGGRAPHA compact retinal scan near-eye display.Katsuyuki Akutsu, Susumu Seino, Yusuke Ogawa, Kenji Ohki, Atsushi Takahashi, Daisuke Ueda, Ryo Ogawa, Teppei Imamura, Akira Yoshikaie
2018TenconA Study on Writer Verification Based on Finger-Writing of a Simple Symbol on a Tablet.Isao Nakanishi, Atsushi Takahashi
2016DATEA fast manufacturability aware Optical Proximity Correction (OPC) algorithm with adaptive wafer image estimation.Ahmed Awad, Atsushi Takahashi, Chikaaki Kodama
2016DATEGrid-based Self-Aligned Quadruple Patterning aware two dimensional routing pattern.Takeshi Ihara, Toshiyuki Hongo, Atsushi Takahashi, Chikaaki Kodama
2015ASPDACFast mask assignment using positive semidefinite relaxation in LELECUT triple patterning lithography.Yukihide Kohira, Tomomi Matsui, Yoko Yokoyama, Chikaaki Kodama, Atsushi Takahashi, Shigeki Nojima, Satoshi Tanaka
2015ISCASEffective two-dimensional pattern generation for self-aligned double patterning.Takeshi Ihara, Atsushi Takahashi, Chikaaki Kodama
2014ASPDAC2-SAT based linear time optimum two-domain clock skew scheduling.Yukihide Kohira, Atsushi Takahashi
2014ICCADA fast process variation and pattern fidelity aware mask optimization algorithm.Ahmed Awad, Atsushi Takahashi, Satoshi Tanaka, Chikaaki Kodama
2014ISAACPositive Semidefinite Relaxation and Approximation Algorithm for Triple Patterning Lithography.Tomomi Matsui, Yukihide Kohira, Chikaaki Kodama, Atsushi Takahashi
2013ASPDACSelf-Aligned Double and Quadruple Patterning-aware grid routing with hotspots control.Chikaaki Kodama, Hirotaka Ichikawa, Koichi Nakayama, Toshiya Kotani, Shigeki Nojima, Shoji Mimotogi, Shinji Miyamoto, Atsushi Takahashi
2012ASPDACAn any-angle routing method using quasi-Newton method.Yukihide Kohira, Atsushi Takahashi
2010ASPDACCAFE router: a fast connectivity aware multiple nets routing algorithm for routing grid with obstacles.Yukihide Kohira, Atsushi Takahashi
2009ASPDACA fast longer path algorithm for routing grid with obstacles using biconnectivity based length upper bound.Yukihide Kohira, Suguru Suehiro, Atsushi Takahashi
2009SMCNumerical Experimentation on Structure Simplification in Bayesian Network.Masakazu Shiba, Atsushi Takahashi, Shingo Aoki, Hiroshi Tsuji, Shuki Inoue
2008ASPDACRoutability driven modification method of monotonic via assignment for 2-layer Ball Grid Array packages.Yoichi Tomioka, Atsushi Takahashi
2008ISCASILP-based optimization of time-multiplexed I/O assignment for multi-FPGA systems.Masato Inagi, Yasuhiro Takashima, Yuichi Nakamura, Atsushi Takahashi
2008KIBayesian Network for Future Home Energy Consumption.Atsushi Takahashi, Shingo Aoki, Hiroshi Tsuji, Shuki Inoue
2008SMCPreference mining for future home energy consumption.Hiroshi Tsuji, Masatomo Kojoma, Atsushi Takahashi, Masayuki Nakano, Shingo Aoki, Shuki Inoue, Kazunari Asari, Eiji Mimura
2007ISCASA Fast Register Relocation Method for Circuit Size Reduction in Generalized-Synchronous Framework.Yukihide Kohira, Atsushi Takahashi
2006ASPDACLow area pipelined circuits by multi-clock cycle paths and clock scheduling.Bakhtiar Affendi Rosdi, Atsushi Takahashi
2006ASPDACMonotonic parallel and orthogonal routing for single-layer ball grid array packages.Yoichi Tomioka, Atsushi Takahashi
2006ISCASEvaluation of 3D-packing representations for scheduling of dynamically reconfigurable systems.Yukihide Kohira, Chikaaki Kodama, Kunihiro Fujiyoshi, Atsushi Takahashi
2003DACOptimal integer delay budgeting on directed acyclic graphs.Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh
2001DATEClustering based fast clock scheduling for light clock-tree.Makoto Saitoh, Masaaki Azuma, Atsushi Takahashi
2001ICRAHuman-Robot Cooperation with Mechanical Interaction Based on Rhythm Entrainment -Realization of Cooperative Rope Turning.Yusuke Maeda, Atsushi Takahashi, Takayuki Hara, Tamio Arai
2000VLSIDPartition, Packing and Clock Distribution-A New Paradigm of Physical Design.Yoji Kajitani, Atsushi Takahashi, Kengo R. Azegami, Shigetoshi Nakatake
1999ASPDACClock Period Minimization of Semi-Synchronous Circuits by Gate-Level Delay Insertion.Tomoyuki Yoda, Atsushi Takahashi, Yoji Kajitani
1999ISCASEnumerating the min-cuts for applications to graph extraction under size constraints.Kengo R. Azegami, Atsushi Takahashi, Y. Kajitan
1998ASPDACAir-Pressure-Model-Based Fast Algorithms for General Floorplan.Tomonori Izumi, Atsushi Takahashi, Yoji Kajitani
1997ASPDACPerformance and reliability driven clock scheduling of sequential logic circuits.Atsushi Takahashi, Yoji Kajitani
1997ICCADClock-tree routing realizing a clock-schedule for semi-synchronous circuits.Atsushi Takahashi, Kazunori Inoue, Yoji Kajitani
1996DATEDetailed-Routability of FPGAs with Extremal Switch-Block Structures.Yasuhiro Takashima, Atsushi Takahashi, Yoji Kajitani