| 2021 | ETS | Arithmetic Circuit Correction by Adding Optimized Correctors Based on Groebner Basis Computation. | Negar Aghapour Sabbagh, Bijan Alizadeh |
| 2016 | ASPDAC | Formally analyzing fault tolerance in datapath designs using equivalence checking. | Payman Behnam, Bijan Alizadeh, Sajjad Taheri, Masahiro Fujita |
| 2016 | DATE | Combinational trace signal selection with improved state restoration for post-silicon debug. | Siamack BeigMohammadi, Bijan Alizadeh |
| 2015 | VTS | Signature oriented model pruning to facilitate multi-threaded processors debugging. | Fatemeh Refan, Bijan Alizadeh, Zainalabedin Navabi |
| 2015 | VTS | UPF-based formal verification of low power techniques in modern processors. | Reza Sharafinejad, Bijan Alizadeh, Masahiro Fujita |
| 2014 | DATE | Dynamic Flip-Flop conversion to tolerate process variation in low power circuits. | Mehrzad Nejat, Bijan Alizadeh, Ali Afzali-Kusha |
| 2014 | ETS | Automatic correction of certain design errors using mutation technique. | Payman Behnam, Bijan Alizadeh, Zainalabedin Navabi |
| 2014 | ETS | Improving polynomial datapath debugging with HEDs. | Somayeh Sadeghi Kohan, Payman Behnam, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi |
| 2014 | VLSID | Formal Verification and Debugging of Array Dividers with Auto-correction Mechanism. | M. H. Haghbayan, Bijan Alizadeh, Payman Behnam, Saeed Safari |
| 2012 | ASPDAC | A formal approach to debug polynomial datapath designs. | Bijan Alizadeh |
| 2012 | MEMOCODE | Polynomial datapath synthesis and optimization based on vanishing polynomial over Z2 | Samaneh Ghandali, Bijan Alizadeh, Zainalabedin Navabi, Masahiro Fujita |
| 2011 | ISCAS | Early case splitting and false path detection to improve high level ATPG techniques. | Bijan Alizadeh, Masahiro Fujita |
| 2010 | ASPDAC | Guided gate-level ATPG for sequential circuits using a high-level test generation approach. | Bijan Alizadeh, Masahiro Fujita |
| 2010 | FPGA | Aggressive overclocking support using a novel timing error recovery technique on FPGAs (abstract only). | Amir Masoud Gharehbaghi, Bijan Alizadeh, Masahiro Fujita |
| 2010 | ICCAD | Polynomial datapath optimization using constraint solving and formal modelling. | Finn Haedicke, Bijan Alizadeh, Grschwin Fey, Masahiro Fujita, Rolf Drechsler |
| 2009 | DAC | Polynomial datapath optimization using partitioning and compensation heuristics. | Omid Sarbishei, Bijan Alizadeh, Masahiro Fujita |
| 2009 | ICCAD | Improved heuristics for finite word-length polynomial datapath optimization. | Bijan Alizadeh, Masahiro Fujita |
| 2009 | MEMOCODE | High-level optimization of integer multipliers over a finite bit-width with verification capabilities. | Omid Sarbishei, Mahmoud Tabandeh, Bijan Alizadeh, Masahiro Fujita |
| 2008 | CSICC | Sequential Equivalence Checking Using a Hybrid Boolean-Word Level Decision Diagram. | Bijan Alizadeh, Masahiro Fujita |
| 2008 | MEMOCODE | Arithmetic Circuits Verification without Looking for Internal Equivalences. | Omid Sarbishei, Bijan Alizadeh, Masahiro Fujita |
| 2007 | ATVA | Automatic Merge-Point Detection for Sequential Equivalence Checking of System-Level and RTL Descriptions. | Bijan Alizadeh, Masahiro Fujita |
| 2006 | ASPDAC | Word level functional coverage computation. | Bijan Alizadeh |
| 2005 | ISCAS | Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams. | Arash Hooshmand, Saeed Shamshiri, Mohammad Alisafaee, Bijan Alizadeh, Pejman Lotfi-Kamran, Mostafa Naderi, Zainalabedin Navabi |