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Borivoje Nikolic

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

50

Venues

20

Active years

1997–2026

Best venue rank

A*

Where they publish

Papers

50 indexed papers, newest first.

YearVenueTitleAuthors
2026DATESimulator-Driven Deep Reinforcement Learning for Analog Circuit Design.Felicia B. Guo, Ken T. Ho, Andrei Vladimirescu, Borivoje Nikolic
2026DATESubstrate: A Statically Typed Framework for Designing Highly Configurable Analog and Mixed-Signal Circuit Generators.Rahul Kumar, Rohan Kumar, Borivoje Nikolic
2025ASPLOSSuperNoVA: Algorithm-Hardware Co-Design for Resource-Aware SLAM.Seah Kim, Roger Hsiao, Borivoje Nikolic, James Demmel, Yakun Sophia Shao
2024ASPLOSRTL-Repair: Fast Symbolic Repair of Hardware Design Code.Kevin Laeufer, Brandon Fajardo, Abhik Ahuja, Vighnesh Iyer, Borivoje Nikolic, Koushik Sen
2024CoRLDiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets.Xiaoyu Huang, Yufeng Chi, Ruofeng Wang, Zhongyu Li, Xue Bin Peng, Yakun Sophia Shao, Borivoje Nikolic, Koushil Sreenath
2024ISCAFireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs.Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic
2024ISLPEDDesign Approach for Die-to-Die Interfaces to Enable Energy-Efficient Chiplet Systems.Vikram Jain, Wei Tang, Zuoguo Wu, Viansa Schmulbach, Yakun Sophia Shao, Zhengya Zhang, Borivoje Nikolic
2023ASPLOSSimulator Independent Coverage for RTL Hardware Languages.Kevin Laeufer, Vighnesh Iyer, David Biancolin, Jonathan Bachrach, Borivoje Nikolic, Koushik Sen
2023HPCAMoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks.Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023ISCACDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems.Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2023ISCARoS: A Hardware-Software Co-Simulation Infrastructure Enabling Pre-Silicon Full-Stack Robotics SoC Evaluation.Dima Nikiforov, Shengjun Chris Dong, Chengyi Lux Zhang, Seah Kim, Borivoje Nikolic, Yakun Sophia Shao
2023MICROAuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads.Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2022DACHammer: a modular and reusable physical design flow tool: invited.Harrison Liew, Daniel Grubb, John Wright, Colin Schmidt, Nayiri Krzysztofowicz, Adam M. Izraelevitz, Edward Wang, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2021DACGemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration.Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2021DACAn Automated and Process-Portable Generator for Phase-Locked Loop.Zhongkai Wang, Minsoo Choi, Eric Chang, John Charles Wright, Wooham Bae, Sijun Du, Zhaokai Liu, Nathan Narevsky, Colin Schmidt, Ayan Biswas, Borivoje Nikolic, Elad Alon
2021ISCASVertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs.Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic
2021ISPASSMemory-Efficient Hardware Performance Counters with Approximate-Counting Algorithms.Jingyi Xu, Sehoon Kim, Borivoje Nikolic, Yakun Sophia Shao
2021MICROA Hardware Accelerator for Protocol Buffers.Sagar Karandikar, Chris Leary, Chris Kennelly, Jerry Zhao, Dinesh Parimi, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2021WCAEImproved Processor Design Project Testing.Ryan Lund, Connor McMahon, Daniel D. Garcia, Borivoje Nikolic
2020ASPLOSFirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design.Sagar Karandikar, Albert J. Ou, Alon Amid, Howard Mao, Randy H. Katz, Borivoje Nikolic, Krste Asanovic
2020DACInvited: Chipyard - An Integrated SoC Research and Implementation Environment.Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic
2020DATEAutoCkt: Deep Reinforcement Learning of Analog Circuit Designs.Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Kourosh Hakhamaneshi, Borivoje Nikolic
2020PIMRCWireless Channel Dynamics for Relay Selection under Ultra-Reliable Low-Latency Communication.Paul Rigge, Vasuki Narasimha Swamy, Christian Nelson, Fredrik Tufvesson, Anant Sahai, Borivoje Nikolic
2019DACOpen-Source EDA Tools and IP, A View from the Trenches.Elad Alon, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2019MEMOCODERTL bug localization through LTL specification mining (WIP).Vighnesh Iyer, Donggyu Kim, Borivoje Nikolic, Sanjit A. Seshia
2018DACACED: a hardware library for generating DSP systems.Angie Wang, Paul Rigge, Adam M. Izraelevitz, Chick Markley, Jonathan Bachrach, Borivoje Nikolic
2018ISCAFireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud.Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic
2018ISITPredicting Wireless Channels for Ultra-Reliable Low-Latency Communications.Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Borivoje Nikolic, Anant Sahai
2016ICASSPA generator of memory-based, runtime-reconfigurable 2N3M5K FFT engines.Angie Wang, Jonathan Bachrach, Borivoje Nikolic
2016WCNCNetwork coding for high-reliability low-latency wireless control.Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2016WCNCNetwork coding for high-reliability low-latency wireless control.Vasuki Narasimha Swamy, Paul Rigge, Gireeja Ranade, Anant Sahai, Borivoje Nikolic
2013ISITRelay scheduling and interference cancellation for quantize-map-and-forward cooperative relaying.Milos Jorgovanovic, Matthew Weiner, David Tse, Borivoje Nikolic, I-Hsiang Wang, Vinayak Nagpal
2011ISCASLDPC decoder architecture for high-data rate personal-area networks.Matthew Weiner, Borivoje Nikolic, Zhengya Zhang
2010ISCASSRAM design in fully-depleted SOI technology.Borivoje Nikolic, Changhwan Shin, Min Hee Cho, Xin Sun, Tsu-Jae King Liu, Bich-Yen Nguyen
2009ISITCooperative multiplexing in the multiple antenna half duplex relay channel.Vinayak Nagpal, Sameer Pawar, David Tse, Borivoje Nikolic
2008GLOBECOMLowering LDPC Error Floors by Postprocessing.Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright
2008ISITError floors in LDPC codes: Fast simulation, bounds and hardware emulation.Pamela Lee, Lara Dolecek, Zhengya Zhang, Venkat Anantharam, Borivoje Nikolic, Martin J. Wainwright
2006GLOBECOMInvestigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation.Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright
2005ISLPEDFinFET-based SRAM design.Zheng Guo, Sriram Balasubramanian, Radu Zlatanovici, Tsu-Jae King, Borivoje Nikolic
2004ISCASPhase-locked loop architecture for adaptive jitter optimization.Sokratis D. Vamvakos, Carl W. Werner, Borivoje Nikolic
2003ISLPEDLevel conversion for dual-supply systems.Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
2003RSPRapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment.Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic
2002ICCADMethods for true power minimization.Robert W. Brodersen, Mark Horowitz, Dejan Markovic, Borivoje Nikolic, Vladimir Stojanovic
2002ICCDCombining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction.Stephanie Augsburger, Borivoje Nikolic
2001DACAchieving 550Mhz in an ASIC Methodology.David G. Chinnery, Borivoje Nikolic, Kurt Keutzer
2001DATEDesign methodology for PicoRadio networks.Julio Leao da Silva Jr., J. Shamberger, M. Josie Ammer, Chunlong Guo, Suet-Fei Li, Rahul C. Shah, Tim Tuan, Michael Sheets, Jan M. Rabaey, Borivoje Nikolic, Alberto L. Sangiovanni-Vincentelli, Paul K. Wright
2001GLOBECOMList Viterbi decoding with continuous error detection for magnetic recording.Dragan Petrovic, Borivoje Nikolic, Kannan Ramchandran
2001GLOBECOMHigh throughput low-density parity-check decoder architectures.Engling Yeo, Payam Pakzad, Borivoje Nikolic, Venkat Anantharam
2001ISLPEDAnalysis and design of low-energy flip-flops.Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen
1997ISLPEDClocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results.Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current