Breeta SenGupta
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2012–2014
Best venue rank
National
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | VTS | Test planning and test access mechanism design for stacked chips using ILP. | Breeta SenGupta, Erik Larsson |
| 2012 | VLSID | Test Planning for Core-based 3D Stacked ICs with Through-Silicon Vias. | Breeta SenGupta, Urban Ingelsson, Erik Larsson |