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Chiara Sandionigi

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

11

Venues

5

Active years

2010–2026

Best venue rank

C

Where they publish

Papers

11 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEMulti-partner project: Ecodesign to reduce electronic waste.Chiara Sandionigi, Olivia Belorgeot, Elise Chaumat, Jean-Christophe Crebier, George Dimitrakopoulos, Lena Froger, Thomas Krivec, Michel Monsellier, Lucas Pinto, Ioannis V. Vondikakis, Christof Wernbacher, Edmund Whitmore, Olivier Pedoussaut
2019IOLTSEstimation of oxide breakdown effects by fault injection.Chiara Sandionigi, Olivier Hron
2016IOLTSFine-grain analysis of the parameters involved in aging of digital circuits.Boukary Ouattara, Olivier Hron, Chiara Sandionigi
2015IOLTSIdentifying aging-aware representative paths in processors.Chiara Sandionigi, Olivier Hron
2015ISLPEDA simulation framework for rapid prototyping and evaluation of thermal mitigation techniques in many-core architectures.Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Julien Mottin, Pascal Vivet, Hela Boussetta, Nicolas Peltier
2014DATEEarly design stage thermal evaluation and mitigation: The locomotiv architectural case.Tanguy Sassolas, Chiara Sandionigi, Alexandre Guerre, Alexandre Aminot, Pascal Vivet, Hela Boussetta, Luca Ferro, Nicolas Peltier
2013IOLTSWhen processors get old: Evaluation of BTI and HCI effects on performance and reliability.Chiara Sandionigi, Olivier Hron, Clement Bertolini, Raphal David
2012ETSIncreasing autonomous fault-tolerant FPGA-based systems' lifetime.Cristiana Bolchini, Antonio Miele, Chiara Sandionigi
2011FPLAutomated Resource-Aware Floorplanning of Reconfigurable Areas in Partially-Reconfigurable FPGA Systems.Cristiana Bolchini, Antonio Miele, Chiara Sandionigi
2011IOLTSA reliable fault classifier for dependable systems on SRAM-based FPGAs.Cristiana Bolchini, Chiara Sandionigi, Luca Fossati, David Merodio Codinachs
2010ETSAn integrated flow for the design of hardened circuits on SRAM-based FPGAs.Cristiana Bolchini, Antonio Miele, Chiara Sandionigi, Niccol Battezzati, Luca Sterpone, Massimo Violante