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Christos P. Sotiriou

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

17

Venues

9

Active years

2002–2026

Best venue rank

A*

Where they publish

Papers

17 indexed papers, newest first.

YearVenueTitleAuthors
2026DDECSEmbedded Tutorial Considerations on the Design of Resilient System-in-Package Based on On-Chip Lifecycle Management.Fabian Vargas, Marko S. Andjelkovic, Christos P. Sotiriou
2026ETSSTA-Based Single Event Transient Propagation in Advanced Technology Nodes.Nikolaos Chatzivangelis, Marios Karagiannis, Christos Georgakidis, Nikolaos Sketopoulos, Marko S. Andjelkovic, Luigi Dilillo, Christos P. Sotiriou
2026ETSMachine Learning Approach for Cross-Technology Prediction of the Generated Single Event Transient.Konstantinos Varakliotis, Nikolaos Zazatis, Marko S. Andjelkovic, Nikolaos Chatzivangelis, Fabian Vargas, Milos Krstic, Christos P. Sotiriou
2026VTSSoft Error Reliability Analysis & Hardening of NVDLA MAC Units.Nikolaos Chatzivangelis, Nikolaos Betsos, Georgios Ioannis Paliaroutis, Nikolaos Zazatis, Pelopidas Tsoumanis, Frederic Wrobel, Marko S. Andjelkovic, Christos P. Sotiriou, Luigi Dilillo
2026VTSCross-Layer Reliability Analysis of Slimmable Neural Networks under Permanent Faults.Nikolaos Zazatis, Alessandro Veronesi, Konstantinos Varakliotis, Pelopidas Tsoumanis, Christos P. Sotiriou, Letcia Maria Bolzani Phls, Marko S. Andjelkovic, Davide Bertozzi
2025DATEMulti-Partner Project: Twinning for Excellence in Reliable Electronics (TWIN-RELECT).Marko S. Andjelkovic, Fabian Vargas, Milos Krstic, Luigi Dilillo, Alain Michez, Frederic Wrobel, Davide Bertozzi, Mikel Lujn, Christos Georgakidis, Nikolaos Chatzivangelis, Katerina Tsilingiri, Nikolaos Zazatis, Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Christos P. Sotiriou
2018DATEAbax: 2D/3D legaliser supporting look-ahead legalisation and blockage strategies.Nikolaos Sketopoulos, Christos P. Sotiriou, Stavros Simoglou
2013VLSIDPolynomial Complexity Asynchronous Control Circuit Synthesis of Concurrent Specifications Based on Burst-Mode FSM Decomposition.Pavlos M. Mattheakis, Christos P. Sotiriou
2012ICCDA polynomial time flow for implementing free-choice Petri-nets.Pavlos M. Mattheakis, Christos P. Sotiriou, Peter A. Beerel
2007DACA Fully-Automated Desynchronization Flow for Synchronous Circuits.Nikolaos Andrikos, Luciano Lavagno, Davide Pandini, Christos P. Sotiriou
2006FPLActual-Delay Circuits on FPGA: Trading-Off Luts for Speed.Evangelia Kassapaki, Pavlos M. Mattheakis, Christos P. Sotiriou
2004DATEFrom Synchronous to Asynchronous: An Automatic Approach.Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Kelvin Lwin, Christos P. Sotiriou
2004DATEAutomatic Scan Insertion and Pattern Generation for Asynchronous Circuits.Aristides Efthymiou, Christos P. Sotiriou, Douglas A. Edwards
2004ICCDCoping with The Variability of Combinational Logic Delays.Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Christos P. Sotiriou
2003DACAutomating the design of an asynchronous DLX microprocessor.Manish Amde, Ivan Blunno, Christos P. Sotiriou
2002DACImplementing asynchronous circuits using a conventional EDA tool-flow.Christos P. Sotiriou
2002WCAERead, use, simulate, experiment and build: an integrated approach for teaching computer architecture.Ioannis Papaefstathiou, Christos P. Sotiriou