Chun-Chuan Chi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2010–2013
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | VTS | 3D-IC interconnect test, diagnosis, and repair. | Chun-Chuan Chi, Cheng-Wen Wu, Min-Jer Wang, Hung-Chih Lin |
| 2011 | DAC | A low-cost wireless interface with no external antenna and crystal oscillator for cm-range contactless testing. | Chin-Fu Li, Chi-Ying Lee, Chen-Hsing Wang, Shu-Lin Chang, Li-Ming Denq, Chun-Chuan Chi, Hsuan-Jung Hsu, Ming-Yi Chu, Jing-Jia Liou, Shi-Yu Huang, Po-Chiun Huang, Hsi-Pin Ma, Jenn-Chyou Bor, Cheng-Wen Wu, Ching-Cheng Tien, Chi-Hu Wang, Yung-Sheng Kuo, Chih-Tsun Huang, Tien-Yu Chang |
| 2011 | ETS | DfT Architecture for 3D-SICs with Multiple Towers. | Chun-Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng-Wen Wu |
| 2011 | ITC | Post-bond testing of 2.5D-SICs and 3D-SICs containing a passive silicon interposer base. | Chun-Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng-Wen Wu |
| 2010 | ETS | A low-cost and scalable test architecture for multi-core chips. | Chun-Chuan Chi, Cheng-Wen Wu, Jin-Fu Li |