Dong Hyun Baik
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
3
Active years
2003–2007
Best venue rank
National
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | VLSID | Test Time Reduction to Test for Path-Delay Faults using Enhanced Random-Access Scan. | Kim T. Le, Dong Hyun Baik, Kewal K. Saluja |
| 2006 | VLSID | Test Cost Reduction Using Partitioned Grid Random Access Scan. | Dong Hyun Baik, Kewal K. Saluja |
| 2005 | ITC | Progressive random access scan: a simultaneous solution to test power, test data volume and test time. | Dong Hyun Baik, Kewal K. Saluja |
| 2005 | VLSID | False Path and Clock Scheduling Based Yield-Aware Gate Sizing. | Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja |
| 2004 | ICCAD | A yield improvement methodology using pre- and post-silicon statistical clock scheduling. | Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Ping Chen, Kewal K. Saluja |
| 2004 | VLSID | Random Access Scan: A solution to test power, test data volume and test time. | Dong Hyun Baik, Kewal K. Saluja, Seiji Kajihara |
| 2003 | VLSID | Exclusive Test and its Applications to Fault Diagnosis. | Vishwani D. Agrawal, Dong Hyun Baik, Yong Chang Kim, Kewal K. Saluja |