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Gaetano Palumbo

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

63

Venues

3

Active years

1994–2025

Best venue rank

C

Where they publish

Papers

63 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASThe charge pump as a signal amplifier: enabling small-signal gain boosting.Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo
2023ISCASFully On-Chip Charge Pump-based Boost Converter in 65-nm CMOS for Single Solar Cell Powered IC.Andrea Ballo, Alfio Dario Grasso, Gaetano Palumbo
2021ISCASA Low-Voltage High-Performance Frequency Divider exploiting Folded MCML.Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti, Gaetano Palumbo
2021ISCASDesign of Three-Stage OTAs from Settling-Time and Slew-Rate Constraints.Gianluca Giustolisi, Gaetano Palumbo
2018ISCASNon-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads.Gianluca Giustolisi, Gaetano Palumbo
2018ISCASSettling-time oriented OTA design through the approximation of the ideal delay.Gianluca Giustolisi, Gaetano Palumbo
2016ISCASVerilog-a modeling of Silicon Photo-Multipliers.Gianluca Giustolisi, Gaetano Palumbo, Paolo Finocchiaro, Alfio Pappalardo
2012ISCASA simple keeper topology to reduce delay variations in nanometer domino logic.Massimo Alioto, Gaetano Palumbo, Melita Pennisi
2012ISCASLogic gates dynamic modeling by means of an ultra-compact MOS model.Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
2011ISCASDET FF topologies: A detailed investigation in the energy-delay-area domain.Massimo Alioto, Elio Consoli, Gaetano Palumbo
2011ISCASTG Master-Slave FFs: High-speed optimization.Elio Consoli, Gaetano Palumbo, Melita Pennisi
2011ISCASVerilog-A modeling of SPAD statistical phenomena.Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo
2011ISCASSelf-biased dual-path push-pull output buffer amplifier topology for LCD driver applications.Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010ISCASClock distribution in clock domains with Dual-Edge-Triggered Flip-Flops to improve energy-efficiency.Massimo Alioto, Elio Consoli, Gaetano Palumbo
2010ISCASAnalytical figure of merit evaluation of RNMC networks for low-power three-stage OTAs.Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010ISCASA novel low-power high-speed rail-to-rail class-B buffer amplifier for LCD output drivers.Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2010ISCASLow-power dual-active class-AB buffer amplifier with self-biasing network for LCD column drivers.Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2009ISCASMetrics and Design Considerations on the Energy-delay Tradeoff of Digital Circuits.Massimo Alioto, Elio Consoli, Gaetano Palumbo
2009ISCASStep-response Optimization Techniques for Low-power Three-stage Operational Amplifiers for Large Capacitive Load Applications.Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2009ISCASA New Advanced RNMC Technique with Dual-active Current and Voltage Buffers for Low-power High-load Three-stage Amplifiers.Davide Marano, Gaetano Palumbo, Salvatore Pennisi
2008ISCASPower-delay optimization in MCML tapered buffers.Massimo Alioto, Gaetano Palumbo
2008ISCASExplicit energy evaluation in RLC tree circuits with ramp inputs.Massimo Alioto, Massimo Poli, Gaetano Palumbo
2008ISCASLow-voltage LDO Compensation Strategy based on Current Amplifiers.Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale
2007ISCASHigh-Speed/Low-Power Mixed Full Adder Chains: Analysis and Comparison versus Technology.Massimo Alioto, Gaetano Palumbo
2007ISCASDesign of Fast Large Fan-In CMOS Multiplexers Accounting for Interconnects.Massimo Alioto, Gaetano Palumbo
2007ISCASDelay Variability Due to Supply Variations in Transmission-Gate Full Adders.Massimo Alioto, Gaetano Palumbo
2007ISCASMiller Compensation: Optimization with Current Buffer/Amplifier.Walter Aloisi, Giuseppe Di Cataldo, Gaetano Palumbo, Salvatore Pennisi
2007ISCASRosenstark-like Representation of Feedback Amplifier Resistance.Christian Falconi, Arnaldo D'Amico, Gianluca Giustolisi, Gaetano Palumbo
2006ISCASDelay uncertainty due to supply variations in static and dynamic full adders.Massimo Alioto, Gaetano Palumbo
2006ISCASNanometer MCML gates: models and design considerations.Massimo Alioto, Gaetano Palumbo
2006ISCASEfficient output transition time modeling in CMOS gates with ramp/exponential inputs.Massimo Alioto, Gaetano Palumbo, Massimo Poli
2006ISCASActive reversed nested Miller compensation for three-stage amplifiers.Alfio Dario Grasso, Gaetano Palumbo, Salvatore Pennisi
2006ISCASAnalysis and evaluation of harmonic distortion in the tunnel diode oscillator.Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi
2005ISCASDesign techniques for low-power cascaded CML gates.Massimo Alioto, Gaetano Palumbo
2005ISCASWell-defined design procedure for a three-stage CMOS OTA.Rosario Mita, Gaetano Palumbo, Salvatore Pennisi
2005ISCASOptimized design of source coupled logic gates in GaAs HEMT technology.Gaetano Palumbo, Pasquale Tommasino, Alessandro Trifiletti
2004ISCASA gate-level strategy to design Carry Select Adders.Massimo Alioto, Gaetano Palumbo, Massimo Poli
2004ISCASLow-voltage linear voltage regulator suitable for memories.Walter Aloisi, Stello Matteo Bill, Gaetano Palumbo
2004ISCASSigma-Delta A/D fuzzy converter.Gianluca Giustolisi, Gaetano Palumbo
2004ISCASHarmonic distortion in three-stage nested-Miller-compensated amplifiers.Gaetano Palumbo, Salvatore Pennisi
2003ISCASDesign of MUX, XOR and D-latch SCL gates.Massimo Alioto, Gaetano Palumbo
2003ISCASA 1-V CMOS output stage with high linearity.Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2003ISCASDesign of low-voltage low-power SC filters for high-frequency applications.Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2003ISCASA novel 1-V class-AB transconductor for improving speed performance in SC applications.Gianluca Giustolisi, Gaetano Palumbo
2003ISCASA new method for evaluating harmonic distortion in push-pull output stages.Gianluca Giustolisi, Gaetano Palumbo
2003ISCASPerformance comparison of Tow-Thomas biquad filters based on VOAs and CFOAs.Rosario Mita, Gaetano Palumbo, Salvatore Pennisi
2002DSDLow Power Strategy for a TFT Controller.Giuseppe Notarangelo, Marco Gibilaro, Francesco Pappalardo, Agatino Pennisi, Gaetano Palumbo
2002ISCASPower-delay trade-offs in SCL gates.Massimo Alioto, Gaetano Palumbo
2002ISCASAnalysis and optimization of gain-boosted telescopic amplifiers.Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2002ISCASAnalysis of power supply noise attenuation in a PTAT current source.Gianluca Giustolisi, Gaetano Palumbo
2002ISCASEvaluation on power reduction applying gated clock approaches.Gaetano Palumbo, Francesco Pappalardo, S. Sannella
2001IOLTSBuilt-In Self Test for Low Cost Testing of a 60 MHz Synchronous Flash Memory.Gaetano Palumbo, Giuseppe Introvaia, Vincenzo Mastrocola, Promod Kumar, Francesco Pipiton
2001ISCASCML ring oscillators: oscillation frequency.Massimo Alioto, Giuseppe Di Cataldo, Gaetano Palumbo
2001ISCASDetailed frequency analysis of power supply rejection in Brokaw bandgap.Gianluca Giustolisi, Gaetano Palumbo
2001ISCASReversed nested Miller compensation with current follower.Rosario Mita, Gaetano Palumbo, Salvatore Pennisi
2001ISCASModeling and minimization of power consumption in charge pump circuits.Gaetano Palumbo, Domenico Pappalardo, Maurizio Gaibotti
2000ISCASEvaluation of power consumption in adiabatic circuits.Massimo Alioto, Gaetano Palumbo
2000ISCASHigh-speed bipolar MUX modeling and design.Massimo Alioto, Gaetano Palumbo
2000ISCASA fuzzy membership function circuit in SC technique.Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
1995ISCASA CMOS CCII+.Giuseppe Di Cataldo, Giuseppe Palmisano, Gaetano Palumbo
1994ISCASOptimized Design of 4 Stage Dickson Voltage Multiplier.Giuseppe Di Cataldo, Gaetano Palumbo
1994ISCASA High-Accuracy High-Speed CMOS Current Comparator.Giuseppe Palmisano, Gaetano Palumbo, Salvatore Pennisi
1994ISCASDesign of the Wilson and Improved Wilson MOS Current Mirrors to Reach the Best Settling time.Gaetano Palumbo