| 2002 | VLSID | Input Space Adaptive Embedded Software Synthesis. | Weidong Wang, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha |
| 2001 | DAC | LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs. | Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshminarayana |
| 2001 | DAC | High-level Software Energy Macro-modeling. | Tat Kee Tan, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha |
| 2001 | DAC | Input Space Adaptive Design: A High-level Methodology for Energy and Performance Optimization. | Weidong Wang, Anand Raghunathan, Ganesh Lakshminarayana, Niraj K. Jha |
| 2001 | ICCAD | Transient Power Management Through High Level Synthesis. | Vijay Raghunathan, Srivaths Ravi, Anand Raghunathan, Ganesh Lakshminarayana |
| 2001 | VLSID | Accurate Power Macro-modeling Techniques for Complex RTL Circuits. | Nachiketh R. Potlapally, Michael S. Hsiao, Anand Raghunathan, Ganesh Lakshminarayana, Srimat T. Chakradhar |
| 2000 | DAC | Power analysis of embedded operating systems. | Robert P. Dick, Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha |
| 2000 | DAC | Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips. | Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshminarayana, Sujit Dey |
| 2000 | ITC | : Reducing test application time in high-level test generation. | Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 2000 | VLSID | High-Level Synthesis with Variable-Latency Components. | Vijay Raghunathan, Srivaths Ravi, Ganesh Lakshminarayana |
| 1999 | DAC | Common-Case Computation: A High-Level Technique for Power and Performance Optimization. | Ganesh Lakshminarayana, Anand Raghunathan, Kamal S. Khouri, Niraj K. Jha, Sujit Dey |
| 1999 | ICCAD | Memory binding for performance optimization of control-flow intensive behaviors. | Kamal S. Khouri, Ganesh Lakshminarayana, Niraj K. Jha |
| 1999 | ICCAD | A framework for testing core-based systems-on-a-chip. | Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 1999 | VTS | TAO-BIST: A Framework for Testability Analysis and Optimizationb of RTL Circuits for BIST. | Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | DAC | Untitled record | Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | DAC | Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions. | Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | DAC | Incorporating Speculative Execution into Scheduling of Control-Flow Intensive Behavioral Descriptions. | Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha |
| 1998 | DATE | IMPACT: A High-Level Synthesis System for Low Power Control-Flow Intensive Circuits. | Kamal S. Khouri, Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | ICCAD | Transforming control-flow intensive designs to facilitate power management. | Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey |
| 1998 | ICCAD | Removal of memory access bottlenecks for scheduling control-flow intensive behavioral descriptions. | Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | ISLPED | Fast high-level power estimation for control-flow intensive design. | Kamal S. Khouri, Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | ITC | TAO: regular expression based high-level testability analysis and optimization. | Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha |
| 1998 | VLSID | A Power Management Methodology for High-Level Synthesis. | Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey |
| 1997 | DAC | COSYN: Hardware-Software Co-Synthesis of Embedded Systems. | Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. Jha |
| 1997 | ICCAD | Wavesched: a novel scheduling technique for control-flow intensive behavioral descriptions. | Ganesh Lakshminarayana, Kamal S. Khouri, Niraj K. Jha |