| 2026 | DATE | Multi-Partner Project: Advancing European Semiconductor and Chiplet Innovation Through the Bavarian Chip Design Center. | Hussam Amrouch, Jehaan Joseph, Michael Schirmer, Johannes Geier, Ulf Schlichtmann, Michael Meidinger, Thomas Wild, Andreas Herkersdorf, Jens Npel, Georg Sigl, Yicheng Zhang, Carsten Trinitis, Aswathy Nedumpalli Sankaranarayanan, Martin Schulz, Andreas Korb, Konrad Hohentanner |
| 2026 | DATE | An Efficient Secure Boot Mechanism Leveraging DICE as a Use Case. | Utku Budak, Malek Safieh, Yigit Arda Ozen, Fabrizio De Santis, Georg Sigl |
| 2026 | DATE | Multi-Partner Project: A Holistic and Open-Source Approach to Efficient, Secure and Reliable AI Hardware Deployment in DI-EDAI. | Georgios Sotiropoulos, Felix Frombach, Julian Hfer, Tanja Harbaum, Jrgen Becker, Henrik Iver Thore, Vincent Meyers, Mehdi B. Tahoori, Zeynep Demirdag, Mohammed Bakr Sikal, Hassan Nassar, Heba Khdr, Jrg Henkel, Christopher Wolters, Philipp van Kempen, Johannes Geier, Ulf Schlichtmann, Batuhan Sesli, Muhammad Sabih, Jakob Wittmann, Frank Hannig, Jrgen Teich, Lukas Steiner, Norbert Wehn, Mohamed Shelkamy Ali, Philipp Schmitz, Wolfgang Kunz, Stefan Koegler, Georg Sigl |
| 2025 | DATE | Multi-Partner Project: Open-Source Design Tools for Co-Development of AI Algorithms and AI Chips: (Initial Stage). | Mehdi B. Tahoori, Jrgen Becker, Jrg Henkel, Wolfgang Kunz, Ulf Schlichtmann, Georg Sigl, Jrgen Teich, Norbert Wehn |
| 2025 | FDTC | Fault Detection in the Control- and Data-Path of Neural Networks. | Matthias Probst, Manuel Brosch, Augustin Ewald, Michael Gruber, Georg Sigl |
| 2024 | DATE | ScanCamouflage: Obfuscating Scan Chains with Camouflaged Sequential and Logic Gates. | Tarik Ibrahimpasic, Grace Li Zhang, Michaela Brunner, Georg Sigl, Bing Li, Ulf Schlichtmann |
| 2024 | DATE | EMDRIVE Architecture: Embedded Distributed Computing and Diagnostics from Sensor to Edge. | Patrick Schmidt, Iuliia Topko, Matthias Stammler, Tanja Harbaum, Jrgen Becker, Rico Berner, Omar Ahmed, Jakub Jagielski, Thomas Seidler, Markus Abel, Marius Kreutzer, Maximilian Kirschner, Victor Pazmino Betancourt, Robin Sehm, Lukas Groth, Andrija Neskovic, Rolf Meyer, Saleh Mulhem, Mladen Berekovic, Matthias Probst, Manuel Brosch, Georg Sigl, Thomas Wild, Matthias Ernst, Andreas Herkersdorf, Florian Aigner, Stefan Hommes, Sebastian Lauer, Maximilian Seidler, Thomas Raste, Gasper Skvarc Bozic, Ibai Irigoyen Ceberio, Muhammad Hassan, Albrecht Mayer |
| 2024 | DDECS | Hardware Honeypot: Setting Sequential Reverse Engineering on a Wrong Track. | Michaela Brunner, Hye-Hyun Lee, Alexander Hepp, Johanna Baehr, Georg Sigl |
| 2024 | DDECS | Fault-Simulation-Based Flip-Flop Classification for Reverse Engineering. | Michael Mildner, Michaela Brunner, Michael Gruber, Johanna Baehr, Georg Sigl |
| 2024 | FDTC | Switch-Glitch : Location of Fault Injection Sweet Spots by Electro-Magnetic Emanation. | Matthias Probst, Michael Gruber, Manuel Brosch, Tim Music, Georg Sigl |
| 2023 | ASPDAC | FPGANeedle: Precise Remote Fault Attacks from FPGA to CPU. | Mathieu Gross, Jonas Krautter, Dennis Gnad, Michael Gruber, Georg Sigl, Mehdi B. Tahoori |
| 2023 | ETS | Counterfeit Detection by Semiconductor Process Technology Inspection. | Matthias Ludwig, Ann-Christin Bette, Bernhard Lippmann, Georg Sigl |
| 2022 | DATE | Counteract Side-Channel Analysis of Neural Networks by Shuffling. | Manuel Brosch, Matthias Probst, Georg Sigl |
| 2022 | DATE | Golden Model-Free Hardware Trojan Detection by Classification of Netlist Module Graphs. | Alexander Hepp, Johanna Baehr, Georg Sigl |
| 2022 | DDECS | Hardware Accelerated FrodoKEM on RISC-V. | Patrick Karl, Tim Fritzmann, Georg Sigl |
| 2022 | DSD | Open Source Hardware Design and Hardware Reverse Engineering: A Security Analysis. | Johanna Baehr, Alexander Hepp, Michaela Brunner, Maja Malenko, Georg Sigl |
| 2022 | ICCAD | A Pragmatic Methodology for Blind Hardware Trojan Insertion in Finalized Layouts. | Alexander Hepp, Tiago D. Perez, Samuel Pagliarini, Georg Sigl |
| 2022 | PQCrypto | A Power Side-Channel Attack on the Reed-Muller Reed-Solomon Version of the HQC Cryptosystem. | Thomas Schamberger, Lukas Holzbaur, Julian Renner, Antonia Wachter-Zeh, Georg Sigl |
| 2021 | FDTC | Algebraic Fault Analysis of Subterranean 2.0. | Michael Gruber, Patrick Karl, Georg Sigl |
| 2020 | ASPDAC | Timing Resilience for Efficient and Secure Circuits. | Grace Li Zhang, Michaela Brunner, Bing Li, Georg Sigl, Ulf Schlichtmann |
| 2020 | CARDIS | A Power Side-Channel Attack on the CCA2-Secure HQC KEM. | Thomas Schamberger, Julian Renner, Georg Sigl, Antonia Wachter-Zeh |
| 2020 | DATE | Extending the RISC-V Instruction Set for Hardware Acceleration of the Post-Quantum Scheme LAC. | Tim Fritzmann, Georg Sigl, Johanna Seplveda |
| 2020 | ICCAD | Efficient Hardware/Software Co-Design for Post-Quantum Crypto Algorithm SIKE on ARM and RISC-V based Microcontrollers. | Debapriya Basu Roy, Tim Fritzmann, Georg Sigl |
| 2019 | ASPDAC | Machine learning and structural characteristics for reverse engineering. | Johanna Baehr, Alessandro Bernardini, Georg Sigl, Ulf Schlichtmann |
| 2019 | CCS | Breaking TrustZone Memory Isolation through Malicious Hardware on a Modern FPGA-SoC. | Mathieu Gross, Nisha Jacob, Andreas Zankl, Georg Sigl |
| 2019 | EWSN | EyeSec: A Retrofittable Augmented Reality Tool for Troubleshooting Wireless Sensor Networks in the Field. | Martin Striegel, Carsten Rolfes, Johann Heyszl, Fabian Helfert, Maximilian Hornung, Georg Sigl |
| 2018 | DAC | A measurement system for capacitive PUF-based security enclosures. | Johannes Obermaier, Vincent Immler, Matthias Hiller, Georg Sigl |
| 2018 | ETS | Towards the formal verification of security properties of a Network-on-Chip router. | Johanna Seplveda, Damian Aboul-Hassan, Georg Sigl, Bernd Becker, Matthias Sauer |
| 2018 | FDTC | Locked out by Latch-up? An Empirical Study on Laser Fault Injection into Arm Cortex-M Processors. | Bodo Selmke, Kilian Zinnecker, Philipp Koppermann, Katja Miller, Johann Heyszl, Georg Sigl |
| 2017 | CCS | EM Side-Channel Analysis of BCH-based Error Correction for PUF-based Key Generation. | Lars Tebelmann, Michael Pehl, Georg Sigl |
| 2017 | CHES | How to Break Secure Boot on FPGA SoCs Through Malicious Hardware. | Nisha Jacob, Johann Heyszl, Andreas Zankl, Carsten Rolfes, Georg Sigl |
| 2017 | DATE | Towards post-quantum security for IoT endpoints with NTRU. | Oscar M. Guillen, Thomas Pppelmann, Jose Maria Bermudo Mera, Elena Fuentes Bongenaar, Georg Sigl, Johanna Seplveda |
| 2017 | DATE | Compromising FPGA SoCs using malicious hardware blocks. | Nisha Jacob, Carsten Rolfes, Andreas Zankl, Johann Heyszl, Georg Sigl |
| 2017 | DATE | ChaCha20-Poly1305 authenticated encryption for high-speed embedded IoT applications. | Fabrizio De Santis, Andreas Schauer, Georg Sigl |
| 2017 | ICCS | Towards Protected MPSoC Communication for Information Protection against a Malicious NoC. | Johanna Seplveda, Andreas Zankl, Daniel Flrez, Georg Sigl |
| 2016 | CARDIS | Squeezing Polynomial Masking in Tower Fields - A Higher-Order Masked AES S-Box. | Fabrizio De Santis, Tobias Bauer, Georg Sigl |
| 2016 | CARDIS | Automated Detection of Instruction Cache Leaks in Modular Exponentiation Software. | Andreas Zankl, Johann Heyszl, Georg Sigl |
| 2016 | CCS | Online Reliability Testing for PUF Key Derivation. | Matthias Hiller, Aysun Gurur nalan, Georg Sigl, Martin Bossert |
| 2016 | CCS | Hiding Higher-Order Univariate Leakages by Shuffling Polynomial Masking Schemes: A More Efficient, Shuffled, and Higher-Order Masked AES S-box. | Fabrizio De Santis, Tobias Bauer, Georg Sigl |
| 2016 | DATE | Practical evaluation of code injection in encrypted firmware updates. | Oscar M. Guillen, Dawin Schmidt, Georg Sigl |
| 2016 | DSD | Fast and Reliable PUF Response Evaluation from Unsettled Bistable Rings. | Robert Hesselbarth, Georg Sigl |
| 2016 | DSD | X25519 Hardware Implementation for Low-Latency Applications. | Philipp Koppermann, Fabrizio De Santis, Johann Heyszl, Georg Sigl |
| 2016 | ESORICS | Towards Efficient Evaluation of a Time-Driven Cache Attack on Modern Processors. | Andreas Zankl, Katja Miller, Johann Heyszl, Georg Sigl |
| 2016 | FDTC | Attack on a DFA Protected AES by Simultaneous Laser Fault Injections. | Bodo Selmke, Johann Heyszl, Georg Sigl |
| 2015 | CARDIS | seTPM: Towards Flexible Trusted Computing on Mobile Devices Based on GlobalPlatform Secure Elements. | Sergej Proskurin, Michael Wei, Georg Sigl |
| 2015 | CARDIS | Precise Laser Fault Injections into 90 nm and 45 nm SRAM-cells. | Bodo Selmke, Stefan Brummer, Johann Heyszl, Georg Sigl |
| 2015 | DSD | A Petite and Power Saving Design for the AES S-Box. | Markus Stefan Wamser, Lukas Holzbaur, Georg Sigl |
| 2014 | CASES | Risk management in embedded devices using metering applications as example. | Oscar M. Guillen, Ralf Brederlow, Ralph Ledwa, Georg Sigl |
| 2014 | DATE | Increasing the efficiency of syndrome coding for PUFs with helper data compression. | Matthias Hiller, Georg Sigl |
| 2014 | DSD | Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs. | Matthias Hiller, Leandro Rodrigues Lima, Georg Sigl |
| 2014 | DSD | Closing the Gap between Speed and Configurability of Multi-bit Fault Emulation Environments for Security and Safety-Critical Designs. | Ralph Nyberg, Jrgen Nolles, Johann Heyszl, Dirk Rabe, Georg Sigl |
| 2014 | EDCC | On MILS I/O Sharing Targeting Avionic Systems. | Kevin Mueller, Georg Sigl, Benoit Triquet, Michael Paulitsch |
| 2013 | CARDIS | Clustering Algorithms for Non-profiled Single-Execution Attacks on Exponentiations. | Johann Heyszl, Andreas Ibing, Stefan Mangard, Fabrizio De Santis, Georg Sigl |
| 2013 | CCS | Breaking through fixed PUF block limitations with differential sequence coding and convolutional codes. | Matthias Hiller, Michael Weiner, Leandro Rodrigues Lima, Maximilian Birkner, Georg Sigl |
| 2013 | DATE | Comprehensive analysis of software countermeasures against fault attacks. | Nikolaus Theiing, Dominik Merli, Michael Smola, Frederic Stumpf, Georg Sigl |
| 2013 | INDOCRYPT | On the Relationship between Correlation Power Analysis and the Stochastic Approach: An ASIC Designer Perspective. | Fabrizio De Santis, Michael Kasper, Stefan Mangard, Georg Sigl, Oliver Stein, Marc Stttinger |
| 2013 | ITC | Differential scan-path: A novel solution for secure design-for-testability. | Salvador Manich, Markus S. Wamser, Oscar M. Guillen, Georg Sigl |
| 2012 | CARDIS | Strengths and Limitations of High-Resolution Electromagnetic Field Measurements for Side-Channel Analysis. | Johann Heyszl, Dominik Merli, Benedikt Heinz, Fabrizio De Santis, Georg Sigl |
| 2011 | FDTC | A Cost-Effective FPGA-based Fault Simulation Environment. | Angelika Janning, Johann Heyszl, Frederic Stumpf, Georg Sigl |
| 2011 | ICCAD | Keynote address: Design of secure systems - Where are the EDA tools? | Georg Sigl |
| 1992 | ICCAD | Accurate net models for placement improvement by network flow methods. | Konrad Doll, Frank M. Johannes, Georg Sigl |
| 1991 | DAC | Analytical Placement: A Linear or a Quadratic Objective Function? | Georg Sigl, Konrad Doll, Frank M. Johannes |
| 1991 | ICCAD | A New Linear Placement Algorithm for Cell Generation. | Edgar Auer, Werner L. Schiele, Georg Sigl |
| 1988 | ICCAD | GORDIAN: a new global optimization/rectangle dissection method for cell placement. | Jrgen M. Kleinhans, Georg Sigl, Frank M. Johannes |