| 2026 | AAAI | LLA: Enhancing Security and Privacy for Generative Models with Logic-Locked Accelerators. | You Li, Guannan Zhao, Yuhao Ju, Yunqi He, Jie Gu, Hai Zhou |
| 2026 | AAAI | BLM-Guard: Explainable Multimodal Ad Moderation with Chain-of-Thought and Policy-Aligned Rewards. | Yiran Yang, Zhaowei Liu, Yuan Yuan, Yukun Song, Xiong Ma, Yinghao Song, Xiangji Zeng, Lu Sun, Yulu Wang, Hai Zhou, Shuai Cui, Zhaohan Gong, Jiefei Zhang |
| 2026 | DATE | Physical-Aware eFPGA Redaction for Secure and Efficient Hardware IP Protection. | Yunqi He, You Li, Ruofan Huang, Guannan Zhao, Hai Zhou |
| 2025 | DAC | RE3: Finding Refinement Relations with Relational Mapping Abstraction. | You Li, Guannan Zhao, Yunqi He, Hai Zhou |
| 2025 | DATE | DE2: SAT-Based Sequential Logic Decryption with a Functional Description. | You Li, Guannan Zhao, Yunqi He, Hai Zhou |
| 2025 | EMNLP | AdDriftBench: A Benchmark for Detecting Data Drift and Label Drift in Short Video Advertising. | Yinghao Song, Xiangji Zeng, Shuai Cui, Lu Sun, Zhaowei Liu, Yuan Yuan, Yulu Wang, Hai Zhou, Zhaohan Gong |
| 2025 | ICPP | Accelerating Erasure Coding on Persistent Memory via Adaptive Prefetcher Scheduling. | Guanglei Xu, Hai Zhou, Yuchong Hu, Dan Feng, Renzhi Xiao |
| 2025 | SC | Make Updates Faster: A Fast Multi-Stripe Updates Framework in Erasure-Coded Storage Clusters. | Hai Zhou, Dan Feng |
| 2024 | DAC | Evaluating the Security of Logic Locking on Deep Neural Networks. | You Li, Guannan Zhao, Yunqi He, Hai Zhou |
| 2024 | ICCAD | The Power of Graph Signal Processing for Chip Placement Acceleration. | Yiting Liu, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang |
| 2024 | SC | CoRD: Combining Raid and Delta for Fast Partial Updates in Erasure-Coded Storage Clusters. | Hai Zhou, Dan Feng, Yuchong Hu, Wei Wang, Huadong Huang |
| 2023 | DAC | SE3: Sequential Equivalence Checking for Non-Cycle-Accurate Design Transformations | You Li, Guannan Zhao, Yunqi He, Hai Zhou |
| 2023 | DATE | ObfusLock: An Efficient Obfuscated Locking Framework for Circuit IP Protection | You Li, Guannan Zhao, Yunqi He, Hai Zhou |
| 2023 | ICCD | Locality-aware Speculative Cache for Fast Partial Updates in Erasure-Coded Cloud Clusters. | Hai Zhou, Yuchong Hu, Dan Feng, Wei Wang, Huadong Huang |
| 2022 | DAC | Floorplanning with graph attention. | Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang |
| 2022 | ICCD | A Stripe-Schedule Aware Repair Technique in the Heterogeneous Network for Erasure-coded Clusters. | Hai Zhou, Dan Feng, Yuchong Hu |
| 2022 | ICPP | Boosting Cross-rack Multi-stripe Repair in Heterogeneous Erasure-coded Clusters. | Hai Zhou, Dan Feng |
| 2021 | DATE | Sequential Logic Encryption Against Model Checking Attack. | Amin Rezaei, Hai Zhou |
| 2021 | ICPP | Multi-level Forwarding and Scheduling Repair Technique in Heterogeneous Network for Erasure-coded Clusters. | Hai Zhou, Dan Feng, Yuchong Hu |
| 2021 | Mobisys | Discovering emergency call pitfalls for cellular networks with formal methods. | Kaiyu Hou, You Li, Yinbo Yu, Yan Chen, Hai Zhou |
| 2020 | DATE | Rescuing Logic Encryption in Post-SAT Era by Locking & Obfuscation. | Amin Rezaei, Yuanqi Shen, Hai Zhou |
| 2020 | SIGCOMM | Network protocol safe configuration search in one shot. | You Li, Kaiyu Hou, Hai Zhou, Yan Chen |
| 2019 | ASPDAC | CycSAT-unresolvable cyclic logic encryption using unreachable states. | Amin Rezaei, You Li, Yuanqi Shen, Shuyu Kong, Hai Zhou |
| 2019 | ASPDAC | BeSAT: behavioral SAT-based attack on cyclic logic encryption. | Yuanqi Shen, You Li, Amin Rezaei, Shuyu Kong, David Dlott, Hai Zhou |
| 2019 | DAC | Digital Compatible Synthesis, Placement and Implementation of Mixed-Signal Time-Domain Computing. | Zhengyu Chen, Hai Zhou, Jie Gu |
| 2019 | DATE | SigAttack: New High-level SAT-based Attack on Logic Encryptions. | Yuanqi Shen, You Li, Shuyu Kong, Amin Rezaei, Hai Zhou |
| 2019 | DATE | An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel. | Xin Wei, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2019 | ICCAD | Resolving the Trilemma in Logic Encryption. | Hai Zhou, Amin Rezaei, Yuanqi Shen |
| 2019 | SIGCOMM | CellScope: Automatically Specifying and Verifying Cellular Network Protocols. | Yinbo Yu, You Li, Kaiyu Hou, Yan Chen, Hai Zhou, Jianfeng Yang |
| 2018 | ASPDAC | A comparative investigation of approximate attacks on logic encryptions. | Yuanqi Shen, Amin Rezaei, Hai Zhou |
| 2018 | DATE | Cyclic locking and memristor-based obfuscation against CycSAT and inside foundry attacks. | Amin Rezaei, Yuanqi Shen, Shuyu Kong, Jie Gu, Hai Zhou |
| 2018 | DATE | SAT-based bit-flipping attack on logic encryptions. | Yuanqi Shen, Amin Rezaei, Hai Zhou |
| 2018 | ICCD | R-Accelerator: A Reconfigurable Accelerator with RRAM Based Logic Contraction and Resource Optimization for Application Specific Computing. | Zhengyu Chen, Hai Zhou, Jie Gu |
| 2017 | ASPDAC | An efficient algorithm for stencil planning and optimization in E-beam lithography. | Jiabei Ge, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2017 | ASPDAC | Network flow based cut redistribution and insertion for advanced 1D layout design. | Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2017 | ICCAD | CycSAT: SAT-based attack on cyclic logic encryptions. | Hai Zhou, Ruifeng Jiang, Shuyu Kong |
| 2017 | ISPA | A Novel N-Retry Transactional Memory Model for Multi-Thread Programming. | Kun Lu, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2017 | PDP | Multi-objective Task Mapping Approach for Wireless NoC in Dark Silicon Age. | Amin Rezaei, Dan Zhao, Masoud Daneshtalab, Hai Zhou |
| 2015 | ASPDAC | Synthesis of resilient circuits from guarded atomic actions. | Yuankai Chen, Hai Zhou |
| 2015 | ASPDAC | Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography. | Yunfeng Yang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng, Dian Zhou |
| 2014 | DATE | Recovery-based resilient latency-insensitive systems. | Yuankai Chen, Xuan Zeng, Hai Zhou |
| 2014 | ICCAD | On error modeling and analysis of approximate adders. | Li Li, Hai Zhou |
| 2013 | DATE | Resource-constrained high-level datapath optimization in ASIP design. | Yuankai Chen, Hai Zhou |
| 2013 | DATE | Retiming for Soft Error Minimization Under Error-Latching Window Constraints. | Yinghai Lu, Hai Zhou |
| 2013 | ICCAD | Layout decomposition with pairwise coloring for multiple patterning lithography. | Ye Zhang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng |
| 2012 | ASPDAC | Buffer minimization in pipelined SDF scheduling on multi-core platforms. | Yuankai Chen, Hai Zhou |
| 2012 | ASPDAC | Optimal prescribed-domain clock skew scheduling. | Li Li, Yinghai Lu, Hai Zhou |
| 2012 | DATE | Clock skew scheduling for timing speculation. | Rong Ye, Feng Yuan, Hai Zhou, Qiang Xu |
| 2012 | ICCAD | An efficient algorithm for library-based cell-type selection in high-performance low-power designs. | Li Li, Peng Kang, Yinghai Lu, Hai Zhou |
| 2012 | ICCAD | Efficient design space exploration for component-based system design. | Yinghai Lu, Hai Zhou |
| 2011 | ASPDAC | Low power discrete voltage assignment under clock skew scheduling. | Li Li, Jian Sun, Yinghai Lu, Hai Zhou, Xuan Zeng |
| 2011 | ASPDAC | Post-routing layer assignment for double patterning. | Jian Sun, Yinghai Lu, Hai Zhou, Xuan Zeng |
| 2011 | ASPDAC | Parallel cross-layer optimization of high-level synthesis and physical design. | James Williamson, Yinghai Lu, Li Shang, Hai Zhou, Xuan Zeng |
| 2011 | ASPDAC | A practical method for multi-domain clock skew optimization. | Yanling Zhi, Hai Zhou, Xuan Zeng |
| 2011 | DAC | Optimal multi-domain clock skew scheduling. | Li Li, Yinghai Lu, Hai Zhou |
| 2011 | DATE | Integrated circuit white space redistribution for temperature optimization. | Yuankai Chen, Hai Zhou, Robert P. Dick |
| 2011 | DATE | An efficient algorithm for multi-domain clock skew scheduling. | Yanling Zhi, Wai-Shing Luk, Hai Zhou, Changhao Yan, Hengliang Zhu, Xuan Zeng |
| 2010 | ASPDAC | iRetILP: an efficient incremental algorithm for min-period retiming under general delay model. | Debasish Das, Jia Wang, Hai Zhou |
| 2010 | ISLPED | Hybrid energy storage system integration for vehicles. | Jia Wang, Kun Li, Qin Lv, Hai Zhou, Li Shang |
| 2009 | ASPDAC | Complete-k-distinguishability for retiming and resynthesis equivalence checking without restricting synthesis. | Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee |
| 2009 | ASPDAC | Exploring adjacency in floorplanning. | Jia Wang, Hai Zhou |
| 2009 | ASPDAC | Risk aversion min-period retiming under process variations. | Jia Wang, Hai Zhou |
| 2009 | DAC | Provably good and practically efficient algorithms for CMP dummy fill. | Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xuan Zeng |
| 2009 | DAC | Statistical reliability analysis under process variation and aging effects. | Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan Yang, Xuan Zeng |
| 2009 | DAC | Multicore parallel min-cost flow algorithm for CAD applications. | Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng |
| 2009 | DSN | Exception triggered DoS attacks on wireless networks. | Yao Zhao, Sagar Vemuri, Jiazhen Chen, Yan Chen, Hai Zhou, Zhi Fu |
| 2009 | FMCAD | Retiming and resynthesis with sweep are complete for sequential transformation. | Hai Zhou |
| 2009 | ICCAD | Binning optimization based on SSTA for transparently-latched circuits. | Min Gong, Hai Zhou, Jun Tao, Xuan Zeng |
| 2008 | ASPDAC | Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering. | Debasish Das, Kip Killpack, Chandramouli V. Kashyap, Abhijit Jas, Hai Zhou |
| 2008 | ASPDAC | A dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications. | Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee |
| 2008 | DAC | An efficient incremental algorithm for min-area retiming. | Jia Wang, Hai Zhou |
| 2008 | EMSOFT | State space abstraction for parameterized self-stabilizing embedded systems. | Nikolaos D. Liveris, Hai Zhou, Robert P. Dick, Prithviraj Banerjee |
| 2008 | ICCAD | Linear constraint graph for floorplan optimization with soft blocks. | Jia Wang, Hai Zhou |
| 2007 | ASPDAC | Fast Buffer Insertion for Yield Optimization Under Process Variations. | Ruiming Chen, Hai Zhou |
| 2007 | ASPDAC | New Block-Based Statistical Timing Analysis Approaches Without Moment Matching. | Ruiming Chen, Hai Zhou |
| 2007 | ASPDAC | Clock Skew Scheduling with Delay Padding for Prescribed Skew Domains. | Chuan Lin, Hai Zhou |
| 2007 | ASPDAC | Retiming for Synchronous Data Flow Graphs. | Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee |
| 2007 | DAC | Fast Min-Cost Buffer Insertion under Process Variations. | Ruiming Chen, Hai Zhou |
| 2007 | DATE | Design closure driven delay relaxation based on convex cost network flow. | Chuan Lin, Aiguo Xie, Hai Zhou |
| 2007 | ICCAD | Timing budgeting under arbitrary process variations. | Ruiming Chen, Hai Zhou |
| 2007 | ICCAD | Gate sizing by Lagrangian relaxation revisited. | Jia Wang, Debasish Das, Hai Zhou |
| 2007 | ICCAD | 3D-STAF: scalable temperature and leakage aware floorplanning for three-dimensional integrated circuits. | Pingqiang Zhou, Yuchun Ma, Zhuoyuan Li, Robert P. Dick, Li Shang, Hai Zhou, Xianlong Hong, Qiang Zhou |
| 2007 | VLSID | Impact of Modern Process Technologies on the Electrical Parameters of Interconnects. | Debjit Sinha, Jianfeng Luo, Subramanian Rajagopalan, Shabbir H. Batterywala, Narendra V. Shenoy, Hai Zhou |
| 2006 | DAC | An efficient retiming algorithm under setup and hold constraints. | Chuan Lin, Hai Zhou |
| 2006 | DAC | Optimal jumper insertion for antenna avoidance under ratio upper-bound. | Jia Wang, Hai Zhou |
| 2006 | DATE | Smart bit-width allocation for low power optimization in a systemc based ASIC design environment. | Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou |
| 2006 | ICCAD | A revisit to floorplan optimization by Lagrangian relaxation. | Chuan Lin, Hai Zhou, Chris C. N. Chu |
| 2006 | ICCAD | A timing dependent power estimation framework considering coupling. | Debjit Sinha, DiaaEldin Khalil, Yehea I. Ismail, Hai Zhou |
| 2006 | ICCD | FA-STAC: A Framework for Fast and Accurate Static Timing Analysis with Coupling. | Debasish Das, Ahmed Shebaita, Hai Zhou, Yehea I. Ismail, Kip Killpack |
| 2006 | MICRO | Yield-Aware Cache Architectures. | Serkan Ozdemir, Debjit Sinha, Gokhan Memik, Jonathan Adams, Hai Zhou |
| 2005 | ASPDAC | Yield driven gate sizing for coupling-noise reduction under uncertainty. | Debjit Sinha, Hai Zhou |
| 2005 | ASPDAC | Interconnect estimation without packing via ACG floorplans. | Jia Wang, Hai Zhou |
| 2005 | ASPDAC | Deriving a new efficient algorithm for min-period retiming. | Hai Zhou |
| 2005 | DAC | Incremental exploration of the combined physical and behavioral design space. | Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Zhou |
| 2005 | DAC | Leakage power optimization with dual-V | Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee |
| 2005 | ICCAD | Efficient algorithms for buffer insertion in general circuits based on network flow. | Ruiming Chen, Hai Zhou |
| 2005 | ICCAD | Clustering for processing rate optimization. | Chuan Lin, Jia Wang, Hai Zhou |
| 2005 | ICCAD | Trade-off between latch and flop for min-period sequential circuit designs with crosstalk. | Chuan Lin, Hai Zhou |
| 2005 | ICCAD | Statistical gate sizing for timing yield optimization. | Debjit Sinha, Narendra V. Shenoy, Hai Zhou |
| 2005 | ICCAD | A unified framework for statistical timing analysis with coupling and multiple input switching. | Debjit Sinha, Hai Zhou |
| 2005 | ISCAS | Timing yield estimation using statistical static timing analysis. | Min Pan, Chris C. N. Chu, Hai Zhou |
| 2004 | ASPDAC | Efficient octilinear Steiner tree construction based on spanning graphs. | Qi Zhu, Hai Zhou, Tong Jing, Xianlong Hong, Yang Yang |
| 2004 | DATE | Wire Retiming for System-on-Chip by Fixpoint Computation. | Chuan Lin, Hai Zhou |
| 2004 | ICCAD | Timing macro-modeling of IP blocks with crosstalk. | Ruiming Chen, Hai Zhou |
| 2004 | ICCAD | Clock schedule verification under process variations. | Ruiming Chen, Hai Zhou |
| 2004 | ICCAD | Optimal wire retiming without binary search. | Chuan Lin, Hai Zhou |
| 2004 | ICCAD | Gate sizing for crosstalk reduction under timing constraints by Lagrangian relaxation. | Debjit Sinha, Hai Zhou |
| 2004 | ICCD | A Flexible Data Structure for Efficient Buffer Insertion. | Ruiming Chen, Hai Zhou |
| 2004 | ICCD | ACG-Adjacent Constraint Graph for General Floorplans. | Hai Zhou, Jia Wang |
| 2003 | ASPDAC | Interconnect-driven floorplanning by searching alternative packings. | Chiu-Wing Sham, Evangeline F. Y. Young, Hai Zhou |
| 2003 | DATE | Timing Verification with Crosstalk for Transparently Latched Circuits. | Hai Zhou |
| 2003 | ICCAD | Retiming for Wire Pipelining in System-On-Chip. | Chuan Lin, Hai Zhou |
| 2002 | ICCAD | Track assignment: a desirable intermediate step between global routing and detailed routing. | Shabbir H. Batterywala, Narendra V. Shenoy, William Nicholls, Hai Zhou |
| 2001 | ASPDAC | Efficient minimum spanning tree construction without Delaunay triangulation. | Hai Zhou, Narendra V. Shenoy, William Nicholls |
| 2001 | DAC | Timing Analysis with Crosstalk as Fixpoints on Complete Lattice. | Hai Zhou, Narendra V. Shenoy, William Nicholls |
| 2000 | DAC | Optimal low power X OR gate decomposition. | Hai Zhou, D. F. Wong |
| 1999 | DAC | Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations. | Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz |
| 1999 | ICCAD | Integrated floorplanning and interconnect planning. | Hung-Ming Chen, Hai Zhou, Fung Yu Young, D. F. Wong, Hannah Honghua Yang, Naveed A. Sherwani |
| 1999 | ICCD | An Efficient Buffer Insertion Algorithm for Large Networks Based on Lagrangian Relaxation. | I-Min Liu, Adnan Aziz, D. F. Wong, Hai Zhou |
| 1998 | CAV | BDD Based Procedures for a Theory of Equality with Uninterpreted Functions. | Anuj Goel, Khurram Sajid, Hai Zhou, Adnan Aziz, Vigyan Singhal |
| 1998 | DAC | Global Routing with Crosstalk Constraints. | Hai Zhou, D. F. Wong |
| 1997 | ICCAD | An exact gate decomposition algorithm for low-power technology mapping. | Hai Zhou, D. F. Wong |
| 1997 | ICCD | Crosstalk-Constrained Maze Routing Based on Lagrangian Relaxation. | Hai Zhou, D. F. Wong |
| 1996 | ICCAD | Optimal non-uniform wire-sizing under the Elmore delay model. | Chung-Ping Chen, Hai Zhou, D. F. Wong |
| 1996 | ICCAD | An optimal algorithm for river routing with crosstalk constraints. | Hai Zhou, D. F. Wong |