| 2004 | DATE | Mapping Multi-Million Gate SoCs on FPGAs: Industrial Methodology and Experience. | Helena Krupnova |
| 2004 | FPL | Deploying Hardware Platforms for SoC Validation: An Industrial Case Study. | Anne Bigot, Fabrice Charpentier, Helena Krupnova, Isabelle Sans |
| 2002 | FPL | How Fast Is Rapid FPGA-based Prototyping: Lessons and Challenges from the Digital TV Design Prototyping Project. | Helena Krupnova, Veronique Meurou, Christophe Barnichon, Carlos Serra, Farid Morsi |
| 2000 | FPL | FPGA-Based Emulation: Industrial and Custom Prototyping Solutions. | Helena Krupnova, Gabriele Saucier |
| 2000 | RSP | FPGA Technology Snapshot: Current Devices and Design Tools. | Helena Krupnova, Gabriele Saucier |
| 1999 | DATE | Iterative Improvement Based Multi-Way Netlist Partitioning for FPGAs. | Helena Krupnova, Gabriele Saucier |
| 1999 | FPGA | Partitioning Large Designs by Filling PFGA Devices with Hierarchy Blocks. | Helena Krupnova, Gabriele Saucier |
| 1999 | FPL | Hierarchical Interactive Approach to Partition Large Designs into FPGAs. | Helena Krupnova, Gabriele Saucier |
| 1999 | RSP | FPGA Partitioning for Rapid Prototyping: A 1 Million Gate Design Case Study. | Helena Krupnova, Christian Rabedaoro, Gabriele Saucier |
| 1998 | FPGA | Block and IP Wrapping for Efficient Design on FPGAs (Abstract). | Helena Krupnova, B. Behnam, Gabriele Saucier |
| 1998 | FPGA | Timing Driven Floorplanning on Programmable Hierarchical Targets. | S. A. Senouci, Aadil Amoura, Helena Krupnova, Gabriele Saucier |
| 1998 | FPL | A Knowledge-Based System for Prototyping on FPFAs. | Helena Krupnova, Vu DucAnh Dinh, Gabriele Saucier |
| 1998 | RSP | Real Time Prototyping Method and a Case Study. | Helena Krupnova, Dinh Duc Anh Vu, Gabriele Saucier, Michel Boubal |
| 1997 | DAC | A Hierarchy-Driven FPGA Partitioning Method. | Helena Krupnova, Ali Abbara, Gabriele Saucier |
| 1997 | FPGA | Synthesis and Floorplanning for Large Hierarchical FPGAs. | Helena Krupnova, Christian Rabedaoro, Gabriele Saucier |