| 2013 | DATE | A spectral clustering approach to application-specific network-on-chip synthesis. | Vladimir Todorov, Daniel Mueller-Gritschneder, Helmut Reinig, Ulf Schlichtmann |
| 2012 | DATE | Automated construction of a cycle-approximate transaction level model of a memory controller. | Vladimir Todorov, Daniel Mueller-Gritschneder, Helmut Reinig, Ulf Schlichtmann |
| 2011 | MICRO | Contrasting multi-synchronous MPSoC design styles for fine-grained clock domain partitioning: the full-HD video playback case study. | Herv Tatenguem, Daniele Ludovici, Alessandro Strano, Davide Bertozzi, Helmut Reinig |
| 1996 | VLSID | CoDe-C: A Novel Two-Level Hardware/Software Co-Design Framework. | Reiner W. Hartenstein, Jrgen Becker, Rainer Kress, Helmut Reinig |
| 1994 | FPL | Data-Procedural Languages for FPL-based Machines. | Andreas Ast, Jrgen Becker, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt |
| 1994 | FPL | A New FPGA Architecture for Word-Oriented Datapaths. | Reiner W. Hartenstein, Rainer Kress, Helmut Reinig |
| 1992 | FPGA | Novel High Performance Machine Paradigms and Fast- Turnaround ASIC Design Methods. | Andreas Ast, Reiner W. Hartenstein, Rainer Kress, Helmut Reinig, Karin Schmidt |