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Jean-Pierre David

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

30

Venues

14

Active years

1998–2025

Best venue rank

A*

Where they publish

Papers

30 indexed papers, newest first.

YearVenueTitleAuthors
2025RSPA Prototyping Framework for P4-Programmable Traffic Managers.Karl La Grassa, Andr Bliveau, Mathieu Lonardon, Jean-Pierre David, Matthieu Arzel, Yvon Savaria
2024AAAITemporal Logic Explanations for Dynamic Decision Systems Using Anchors and Monte Carlo Tree Search (Abstract Reprint).Tzu-Yi Chiu, Jerome Le Ny, Jean-Pierre David
2023ASPDACBARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU.Mohammadhossein Askarihemmat, Sean Wagner, Olexa Bilaniuk, Yassine Hariri, Yvon Savaria, Jean-Pierre David
2023ISCASQuark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference.MohammadHossein AskariHemmat, Tho Dupuis, Yoan Fournier, Nizar El Zarif, Matheus A. Cavalcante, Matteo Perotti, Frank K. Grkaynak, Luca Benini, Franois Leduc-Primeau, Yvon Savaria, Jean-Pierre David
2022ISCASAn FPGA-based HW/SW Co-Verification Environment for Programmable Network Devices.Mengyue Su, Jean-Pierre David, Yvon Savaria, Bill Pontikakis, Thomas Luinaud
2021ISCASRISC-V Barrel Processor for Deep Neural Network Acceleration.MohammadHossein AskariHemmat, Olexa Bilaniuk, Sean Wagner, Yvon Savaria, Jean-Pierre David
2020FCCMRISC-V Barrel Processor for Accelerator Control.MohammadHossein AskariHemmat, Olexa Bilaniuk, Sean Wagner, Yvon Savaria, Jean-Pierre David
2019InterspeechBinary Speech Features for Keyword Spotting Tasks.Alexandre Riviello, Jean-Pierre David
2019ISCASBit-Slicing FPGA Accelerator for Quantized Neural Networks.Olexa Bilaniuk, Sean Wagner, Yvon Savaria, Jean-Pierre David
2019MICCAIU-Net Fixed-Point Quantization for Medical Image Segmentation.MohammadHossein AskariHemmat, Sina Honari, Lucas Rouhier, Christian S. Perone, Julien Cohen-Adad, Yvon Savaria, Jean-Pierre David
2017ISORCA Cache-Coherent Heterogeneous Architecture for Low Latency Real Time Applications.Michel Gemieux, Yvon Savaria, Jean-Pierre David, Guchuan Zhu
2013FCCMHigh-Level Description and Synthesis of Floating-Point Accumulators on FPGA.Marc-Andr Daigneault, Jean-Pierre David
2013FPGAHardware description and synthesis of control-intensive reconfigurable dataflow architectures (abstract only).Marc-Andr Daigneault, Jean-Pierre David
2012FPLRaising the abstraction level of HDL for control-dominant applications.Marc-Andr Daigneault, Jean-Pierre David
2012ISCASTwo-level configuration for FPGA: A new design methodology based on a computing fabric.Mathieu Allard, Patrick Grogan, Yvon Savaria, Jean-Pierre David
2010FCCMPerforming Floating-Point Accumulation on a Modern FPGA in Single and Double Precision.Tarek Ould Bachir, Jean-Pierre David
2010FPGATowards 5ps resolution TDC on a dynamically reconfigurable FPGA (abstract only).Marc-Andr Daigneault, Jean-Pierre David
2008CCHardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs.Etienne Bergeron, Marc Feeley, Jean-Pierre David
2008ICCDApplication Specific Instruction set processor specialized for block motion estimation.Marc-Andr Daigneault, J. M. Pierre Langlois, Jean-Pierre David
2008ICALTSetting up On-Line Learning Experiments: The LearningLab Platform.Jean-Michel Adam, Anne Lejeune, Sandra Michelet, Jean-Pierre David, Christian Martel
2006ICALTExpressing Workshop Scenario with Computer Independent Model.Jean-Pierre David, Anne Lejeune, Emmanuelle Villiot-Leclercq
2006ICALTModeling Collaborative Learning Activities on e-Learning Platforms.Christian Martel, Laurence Vignollet, Christine Ferraris, Jean-Pierre David, Anne Lejeune
2006ICALTLDL: An Alternative EML.Christian Martel, Laurence Vignollet, Christine Ferraris, Jean-Pierre David, Anne Lejeune
2006ICALTComparing Educational Modeling Languages on a Case Study.Laurence Vignollet, Jean-Pierre David, Christine Ferraris, Christian Martel, Anne Lejeune
2006ICALTExpressing Learning Scenarios with Computer Independent Models.Emmanuelle Villiot-Leclercq, Jean-Pierre David, Anne Lejeune
2005RSPHigh Level Synthesis for Data-Driven Applications.Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley, Jean-Pierre David
2004FDLAn Intermediate Level HDL for System Level Design.Jean-Pierre David, Etienne Bergeron
2002FPLAn FPGA Implementation of the Linear Cryptanalysis.Franois Koeune, Gal Rouvroy, Franois-Xavier Standaert, Jean-Jacques Quisquater, Jean-Pierre David, Jean-Didier Legat
2002FPLA Cryptanalytic Time-Memory Tradeoff: First FPGA Implementation.Jean-Jacques Quisquater, Franois-Xavier Standaert, Gal Rouvroy, Jean-Pierre David, Jean-Didier Legat
1998RSPA Data-Flow Oriented Co-Design for Reconfigurable Systems.Jean-Pierre David, Jean-Didier Legat