Jouke Verbree
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2010–2010
Best venue rank
B
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | ETS | Test-architecture optimization for TSV-based 3D stacked ICs. | Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakrabarty, Erik Jan Marinissen, Jouke Verbree |
| 2010 | ETS | On the cost-effectiveness of matching repositories of pre-tested wafers for wafer-to-wafer 3D chip stacking. | Jouke Verbree, Erik Jan Marinissen, Philippe Roussel, Dimitrios Velenis |
| 2010 | ITC | On maximizing the compound yield for 3D Wafer-to-Wafer stacked ICs. | Mottaqiallah Taouil, Said Hamdioui, Jouke Verbree, Erik Jan Marinissen |
| 2010 | VTS | A structured and scalable test access architecture for TSV-based 3D stacked ICs. | Erik Jan Marinissen, Jouke Verbree, Mario Konijnenburg |