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Kanad Ghose

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

74

Venues

31

Active years

1988–2025

Best venue rank

A*

Where they publish

Papers

74 indexed papers, newest first.

YearVenueTitleAuthors
2025ASPLOSCOGENT: Adaptable Compiler Toolchain for Tagging RISC-V Binaries.David B. Demicco, Matthew Cole, Gokturk Yuksek, Ravi Theja Gollapudi, Aravind Prakash, Kanad Ghose, Zerksis Umrigar
2025ICCADAddressing Thermal Throttling in HBM.Gaurav Kothari, Kanad Ghose
2023ICCADThermally-Aware Multi-Core Chiplet Stacking.Gaurav Kothari, Kanad Ghose
2023SPControl Flow and Pointer Integrity Enforcement in a Secure Tagged Architecture.Ravi Theja Gollapudi, Gokturk Yuksek, David Demicco, Matthew Cole, Gaurav Kothari, Rohit Kulkarni, Xin Zhang, Kanad Ghose, Aravind Prakash, Zerksis Umrigar
2021CLOUDLatency-Aware Dynamic Server and Cooling Capacity Provisioner for Data Centers.Anuroop Desu, Udaya Puvvadi, Tyler Stachecki, Sagar Vishwakarma, Sadegh Khalili, Kanad Ghose, Bahgat G. Sammakia
2021ICMLADeep Learning for Morphological Arrhythmia Classification in Encoded ECG Signal.Sandeep S. Mittal, Jack Rothberg, Kanad Ghose
2019INDINAC vs. Hybrid AC/DC Powered Data Centers: A Workload Based Perspective.Anuroop Desu, Udaya Puvvadi, Tyler Stachecki, Shane Case, Kanad Ghose
2019INDINFlow Disruptions and Mitigation in Virtualized Water-Cooled Data Centers.Udaya Puvvadi, Anuroop Desu, Tyler Stachecki, Sami Alkharabsheh, Kanad Ghose, Bahgat Sammakia
2019INDINCharacterization of Liquid Cooled Cold Plates for a Multi Chip Module (MCM) and their Impact on Data Center Chiller Operation.Bharath Ramakrishnan, Mohammad Tradat, Yaser Hadad, Kanad Ghose, Bahgat Sammakia
2019IROSA Convolutional Neural Network Feature Detection Approach to Autonomous Quadrotor Indoor Navigation.Adriano Garcia, Sandeep S. Mittal, Edward Kiewra, Kanad Ghose
2015HiPCFlexCore: A Reconfigurable Processor Supporting Flexible, Dynamic Morphing.Furat Afram, Kanad Ghose
2014MICROContinuous, Low Overhead, Run-Time Validation of Program Executions.Erdem Aktas, Furat Afram, Kanad Ghose
2013HPCAA group-commit mechanism for ROB-based processors implementing the X86 ISA.Furat Afram, Hui Zeng, Kanad Ghose
2013SACRun-time control flow authentication: an assessment on contemporary x86 platforms.Erdem Aktas, Kanad Ghose
2012PDPEnergy-Aware Load Direction for Servers: A Feasibility Study.Shane Case, Furat Afram, Erdem Aktas, Kanad Ghose
2012SDMDetecting and Tracking Coordinated Groups in Dense, Systematically Moving, Crowds.James Rosswog, Kanad Ghose
2011DACMARSS: a full system simulator for multicore x86 CPUs.Avadh Patel, Furat Afram, Shunfei Chen, Kanad Ghose
2010SACEfficiently detecting clusters of mobile objects in the presence of dense noise.James Rosswog, Kanad Ghose
2009DACMPTLsim: a simulator for X86 multicore processors.Hui Zeng, Matt T. Yourst, Kanad Ghose, Dmitry V. Ponomarev
2009ICPPRegister Versioning: A Low-Complexity Implementation of Register Renaming in Out-of-Order Microarchitectures.Hui Zeng, Kanad Ghose, Dmitry Ponomarev
2009ISLPEDEnergy-efficient renaming with register versioning.Hui Zeng, Ju-Young Jung, Kanad Ghose, Dmitry Ponomarev
2009ISLPEDAn energy-efficient checkpointing mechanism for out of order commit processor.Hui Zeng, Matt T. Yourst, Kanad Ghose
2008ACSACDARE: A Framework for Dynamic Authentication of Remote Executions.Erdem Aktas, Kanad Ghose
2008ICDMDetecting and Tracking Spatio-temporal Clusters with Adaptive History Filtering.James Rosswog, Kanad Ghose
2008ISLPEDEnergy-efficient MESI cache coherence with pro-active snoop filtering for multicore microprocessors.Avadh Patel, Kanad Ghose
2007EuroSyshFS: a hybrid file system prototype for improving small file and metadata performance.Zhihui Zhang, Kanad Ghose
2006HiPCTrade-Offs in Transient Fault Recovery Schemes for Redundant Multithreaded Processors.Joseph J. Sharkey, Nayef Abu-Ghazeleh, Dmitry V. Ponomarev, Kanad Ghose, Aneesh Aggarwal
2006ISLPEDSelective writeback: exploiting transient values for energy-efficiency and performance.Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose
2006ISLPEDRegister file caching for energy efficiency.Hui Zeng, Kanad Ghose
2005ICCDPower-Efficient Wakeup Tag Broadcast.Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomarev, Oguz Ergin
2005ISLPEDInstruction packing: reducing power and delay of the dynamic scheduling logic.Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghose, Oguz Ergin
2005MICROIncremental Commit Groups for Non-Atomic Trace Processing.Matt T. Yourst, Kanad Ghose
2005NCAImproving Transaction Server Performance under Heavy Loads with Differentiated Service and Active Network Interfaces.Onur Demir, Kanad Ghose
2004EGPGVFast Remote Isosurface Visualization With Chessboarding.Alisa Neeman, Peter Sulatycke, Kanad Ghose
2004GLOBECOMMaintaining useful server throughput under load attacks using active NIC portals.Onur Demir, Kanad Ghose
2004ICCDIncreasing Processor Performance Through Early Register Release.Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kanad Ghose
2004MICRORegister Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure.Oguz Ergin, Deniz Balkan, Kanad Ghose, Dmitry V. Ponomarev
2003FASTyFS: A Journaling File System Design for Handling Large Data Sets with Reduced Seeking.Zhihui Zhang, Kanad Ghose
2003ICCDDistributed Reorder Buffer Schemes for Low Power.Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose
2003ISLPEDReducing reorder buffer complexity through selective operand caching.Gurhan Kucuk, Dmitry Ponomarev, Oguz Ergin, Kanad Ghose
2003ISLPEDPower efficient comparators for long arguments in superscalar processors.Dmitry Ponomarev, Gurhan Kucuk, Oguz Ergin, Kanad Ghose
2002DATEAccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors.Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
2002ICCDA Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors.Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev
2002ICPPMultithreaded Isosurface Rendering on SMPs Using Span-Space Buckets.Peter Sulatycke, Kanad Ghose
2002ICSLow-complexity reorder buffer architecture.Gurhan Kucuk, Dmitry Ponomarev, Kanad Ghose
2001EuroParOptimal Polling for Latency-Throughput Tradeoffs in Queue-Based Network Interfaces for Clusters.Dmitry Ponomarev, Kanad Ghose, Evgeny Saksonov
2001ISLPEDEnergy: efficient instruction dispatch buffer design for superscalar processors.Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge
2001MICROReducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources.Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
2000ISLPEDReducing energy requirements for instruction issue and dispatch in superscalar microprocessors (poster session).Kanad Ghose
1999EuroParDesigning Multiprocessor/Distributed Real-Time Systems Using the ASSERTS Toolkit.Kanad Ghose, Sudhir Aggarwal, Abhrajit Ghosh, David Goldman, Peter Sulatycke, Pavel Vasek, David R. Vogel
1999EuroParPost-Scheduling Optimization of Parallel Programs.Stephen Shafer, Kanad Ghose
1999ISLPEDReducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation.Kanad Ghose, Milind B. Kamble
1999SACMulti-Sensory Browser and Editor Model.James W. Ryder, Kanad Ghose
1998HiPCA comparative study of some network subsystem organizations.Dmitry V. Ponomarev, Kanad Ghose
1997ECRTSASSERTS: a toolkit for real-time software design, development and evaluation.Kanad Ghose, Sudhir Aggarwal, Pavel Vasek, S. Chandra, Amritansh Raghav, Abrahijt Ghosh, David R. Vogel
1997HiPCA comparison of two context allocation approaches for fast protected calls.Pavel Vasek, Kanad Ghose
1997ICPPThe Implementation of Low Latency Communication Primitives in the Snow Prototype.Kanad Ghose, Seth Melnick, Tom Gaska, Seth Goldberg, Arun K. Jayendran, Brian T. Stein
1997ISLPEDAnalytical energy dissipation models for low-power caches.Milind B. Kamble, Kanad Ghose
1997PDPGeneralized cubic networks.Kiran Raghavendra Desai, Kanad Ghose
1997PDPProtected, low-latency message passing in the SNOW prototype.Kanad Ghose, Arun K. Jayendran, Brian T. Stein
1997VLSIDEnergy-Efficiency of VLSI Caches: A Comparative Study.Milind B. Kamble, Kanad Ghose
1995EuroParA Formal Study of the Mcube Interconnection Network.Nitin K. Singhvi, Kanad Ghose
1995ICPPStatic Message Combining in Task Graph Schedules.Stephen Shafer, Kanad Ghose
1995ICSA Comparative Study of Single Hop WDM Interconnections for Multiprocessors.Kiran Raghavendra Desai, Kanad Ghose
1994ICPPHybrid Multiprocessing inKanad Ghose, R. Kym Horsell, Nitin K. Singhvi
1994ICPPA Bottom-Up Approach to Task Scheduling in Distributed Memory Multiprocessors.Neelima Mehdiratta, Kanad Ghose
1994VLSIDResponse Pipelined CAM Chips: The First Generation and Beyond.Kanad Ghose, V. Anand Dharmaraj
1992ISCAThe time-constrained barrier synchronizer and its applications in parallel systems.Der-Chung Cheng, Kanad Ghose
1992VLSIDScalable, Pipelined, Cmos VLSI Content Addressable Memory Chips - Architecture And Implementation.Kanad Ghose, Arun Gupta
1991ICPPEfficient Synchronization Schemes for Large-Scale Shared-Memory Multiprocessors.Kanad Ghose, Der-Chung Cheng
1991ICPPA Cache Coherency Mechanism with Limited Combining Capabilities for MIN-Based Multiprocessors.Kanad Ghose, Sreenivas Simhadri
1990ICPPThe Design and Evaluation of the Hierarchical Cubic Network.Kanad Ghose, Kiran Raghavendra Desai
1989SCThe HCN: a versatile interconnection network based on cubes.Kanad Ghose, Kiran Raghavendra Desai
1988ICCDThe capability mechanism of a VLSI processor.Kanad Ghose, Robert M. Stewart Jr.