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Krste Asanovic

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

84

Venues

31

Active years

1997–2024

Best venue rank

A*

Where they publish

Papers

84 indexed papers, newest first.

YearVenueTitleAuthors
2024ASPLOSZoomie: A Software-like Debugging Tool for FPGAs.Tianrui Wei, Kevin Laeufer, Katie Lim, Jerry Zhao, Koushik Sen, Jonathan Balkind, Krste Asanovic
2024ISCAFireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs.Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic
2023HPCAMoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks.Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2023ISCAProfiling Hyperscale Big Data Processing.Abraham Gonzalez, Aasheesh Kolli, Samira Manabi Khan, Sihang Liu, Vidushi Dadu, Sagar Karandikar, Jichuan Chang, Krste Asanovic, Parthasarathy Ranganathan
2023ISCACDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems.Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2023MICROAuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads.Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2022CCSCerberus: A Formal Approach to Secure and Efficient Enclave Memory Sharing.Dayeol Lee, Kevin Cheang, Alexander Thomas, Catherine Lu, Pranav Gaddamadugu, Anjo Vahldiek-Oberwagner, Mona Vij, Dawn Song, Sanjit A. Seshia, Krste Asanovic
2022DACHammer: a modular and reusable physical design flow tool: invited.Harrison Liew, Daniel Grubb, John Wright, Colin Schmidt, Nayiri Krzysztofowicz, Adam M. Izraelevitz, Edward Wang, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2021DACGemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration.Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
2021ISCASVertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs.Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic
2021ISPASSCOBRA: A Framework for Evaluating Compositions of Hardware Branch Predictors.Jerry Zhao, Abraham Gonzalez, Alon Amid, Sagar Karandikar, Krste Asanovic
2021MICROA Hardware Accelerator for Protocol Buffers.Sagar Karandikar, Chris Leary, Chris Kennelly, Jerry Zhao, Dinesh Parimi, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
2020ASPLOSFirePerf: FPGA-Accelerated Full-System Hardware/Software Performance Profiling and Co-Design.Sagar Karandikar, Albert J. Ou, Alon Amid, Howard Mao, Randy H. Katz, Borivoje Nikolic, Krste Asanovic
2020CGONeuroVectorizer: end-to-end vectorization with deep reinforcement learning.Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica
2020DACInvited: Chipyard - An Integrated SoC Research and Implementation Environment.Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic
2020EuroSysKeystone: an open framework for architecting trusted execution environments.Dayeol Lee, David Kohlbrenner, Shweta Shinde, Krste Asanovic, Dawn Song
2020ISCAGenesis: A Hardware Acceleration Framework for Genomic Data Analysis.Tae Jun Ham, David Bruns-Smith, Brendan Sweeney, Yejin Lee, Seong Hoon Seo, U. Gyeong Song, Young H. Oh, Krste Asanovic, Jae W. Lee, Lisa Wu Wills
2020NetSoftRLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization.Bin Li, Yipeng Wang, Ren Wang, Charlie Tai, Ravi R. Iyer, Zhu Zhou, Andrew Herdrich, Tong Zhang, Ameer Haj-Ali, Ion Stoica, Krste Asanovic
2019DACOpen-Source EDA Tools and IP, A View from the Trenches.Elad Alon, Krste Asanovic, Jonathan Bachrach, Borivoje Nikolic
2019DATESanctorum: A lightweight security monitor for secure enclaves.Ilia A. Lebedev, Kyle Hogan, Jules Drean, David Kohlbrenner, Dayeol Lee, Krste Asanovic, Dawn Song, Srinivas Devadas
2019FCCMAutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning.Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2019FPGAFASED: FPGA-Accelerated Simulation and Evaluation of DRAM.David Biancolin, Sagar Karandikar, Donggyu Kim, Jack Koenig, Andrew Waterman, Jonathan Bachrach, Krste Asanovic
2019HPCAFPGA Accelerated INDEL Realignment in the Cloud.Lisa Wu, David Bruns-Smith, Frank A. Nothaft, Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krste Asanovic, David A. Patterson, Anthony D. Joseph
2019ICCADCentrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration.Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek
2019ICCADGolden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes.Albert Magyar, David Biancolin, John Koenig, Sanjit A. Seshia, Jonathan Bachrach, Krste Asanovic
2019MICROSimmani: Runtime Power Modeling for Arbitrary RTL with Automatic Signal Selection.Donggyu Kim, Jerry Zhao, Jonathan Bachrach, Krste Asanovic
2018DACCo-design of deep neural nets and neural net accelerators for embedded vision applications.Kiseok Kwon, Alon Amid, Amir Gholami, Bichen Wu, Krste Asanovic, Kurt Keutzer
2018FPLDESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles.Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach, Krste Asanovic
2018ISCAFireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud.Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic
2018ISCAA Hardware Accelerator for Tracing Garbage Collection.Martin Maas, Krste Asanovic, John Kubiatowicz
2017ARITHA Hardware Accelerator for Computing an Exact Dot Product.Jack Koenig, David Biancolin, Jonathan Bachrach, Krste Asanovic
2017HotOSReturn of the Runtimes: Rethinking the Language Runtime System for the Cloud 3.0 Era.Martin Maas, Krste Asanovic, John Kubiatowicz
2017ICCADCyclist: Accelerating hardware development.Jonathan Bachrach, Albert Magyar, Daniel Palmer Dabbelt, Patrick Li, Richard Lin, Krste Asanovic
2016ASPLOSTaurus: A Holistic Language Runtime System for Coordinating Distributed Managed-Language Applications.Martin Maas, Krste Asanovic, Tim Harris, John Kubiatowicz
2016ISCAVector Processors for Energy-Efficient Embedded Systems.Daniel Palmer Dabbelt, Colin Schmidt, Eric Love, Howard Mao, Sagar Karandikar, Krste Asanovic
2016ISCAStrober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL.Donggyu Kim, Adam M. Izraelevitz, Christopher Celio, Hokeun Kim, Brian Zimmer, Yunsup Lee, Jonathan Bachrach, Krste Asanovic
2015ASPLOSDIABLO: A Warehouse-Scale Computer Network Simulator using FPGAs.Zhangxi Tan, Zhenghao Qian, Xi Chen, Krste Asanovic, David A. Patterson
2015HotOSTrash Day: Coordinating Garbage Collection in Distributed Systems.Martin Maas, Tim Harris, Krste Asanovic, John Kubiatowicz
2015SCGAIL: the graph algorithm iron law.Scott Beamer, Krste Asanovic, David A. Patterson
2014ICSAuthor retrospective for optimizing matrix multiply using PHiPAC: a portable high-performance ANSI C coding methodology.Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, Jim Demmel
2014MICROExploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures.Yunsup Lee, Vinod Grover, Ronny Krashinsky, Mark Stephenson, Stephen W. Keckler, Krste Asanovic
2013CCSPHANTOM: practical oblivious computation in a secure processor.Martin Maas, Eric Love, Emil Stefanov, Mohit Tiwari, Elaine Shi, Krste Asanovic, John Kubiatowicz, Dawn Song
2013CGOConvergence and scalarization for data-parallel architectures.Yunsup Lee, Ronny Krashinsky, Vinod Grover, Stephen W. Keckler, Krste Asanovic
2013DACTessellation: refactoring the OS around explicit resource containers with continuous adaptation.Juan A. Colmenares, Gage Eads, Steven Hofmeyr, Sarah Bird, Miquel Moret, David Chou, Brian Gluzman, Eric Roman, Davide B. Bartolini, Nitesh Mor, Krste Asanovic, John Kubiatowicz
2013ISCAA hardware evaluation of cache partitioning to improve utilization and energy-efficiency while preserving responsiveness.Henry Cook, Miquel Moret, Sarah Bird, Khanh Dao, David A. Patterson, Krste Asanovic
2012DACChisel: constructing hardware in a Scala embedded language.Jonathan Bachrach, Huy Vo, Brian C. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic
2012SCDirection-optimizing breadth-first search.Scott Beamer, Krste Asanovic, David A. Patterson
2011ISCAExploring the tradeoffs between programmability and efficiency in data-parallel accelerators.Yunsup Lee, Rimas Avizienis, Alex Bishara, Richard Xia, Derek Lockhart, Christopher Batten, Krste Asanovic
2010DACRAMP gold: an FPGA-based architecture simulator for multiprocessors.Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic
2010ISCARe-architecting DRAM memory systems with monolithically integrated silicon photonics.Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi, Christopher Batten, Vladimir Stojanovic, Krste Asanovic
2010ISCAA case for FAME: FPGA architecture model execution.Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovic, David A. Patterson
2010PLDIComposing parallel software efficiently with lithe.Heidi Pan, Benjamin Hindman, Krste Asanovic
2009ICSDesigning multi-socket systems using silicon photonics.Scott Beamer, Krste Asanovic, Christopher Batten, Ajay Joshi, Vladimir Stojanovic
2008CGOCompiling for vector-thread architectures.Mark Hampton, Krste Asanovic
2008HOTIBuilding Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics.Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos A. Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Krtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic
2008ISCAGlobally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks.Jae W. Lee, Man Cheuk Ng, Krste Asanovic
2008MEMOCODEMEMOCODE 2008 Co-Design Contest.Patrick Schaumont, Krste Asanovic, James C. Hoe
2007ICCDContinual hashing for efficient fine-grain state inconsistency detection.Jae W. Lee, Myron King, Krste Asanovic
2006ICSImplementing virtual memory in a vector processor with software restart markers.Mark Hampton, Krste Asanovic
2006ISPASSBranch trace compression for snapshot-based simulation.Kenneth C. Barr, Krste Asanovic
2006ISPASSAccelerating architectural exploration using canonical instruction segments.Rose F. Liu, Krste Asanovic
2006RTASMETERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors.Jae W. Lee, Krste Asanovic
2005HPCAUnbounded Transactional Memory.C. Scott Ananian, Krste Asanovic, Bradley C. Kuszmaul, Charles E. Leiserson, Sean Lie
2005ISCAVictim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors.Michael Zhang, Krste Asanovic
2005ISLPEDReplacing global wires with an on-chip network: a power analysis.Seongmoo Heo, Krste Asanovic
2005ISPASSAccelerating Multiprocessor Simulation with a Memory Timestamp Record.Kenneth C. Barr, Heidi Pan, Michael Zhang, Krste Asanovic
2005SOSPMondrix: memory isolation for linux using mondriaan memory protection.Emmett Witchel, Junghwan Rhee, Krste Asanovic
2004ISCAThe Vector-Thread Architecture.Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic
2004ISLPEDPower-optimal pipelining in deep submicron technology.Seongmoo Heo, Krste Asanovic
2004MICROCache Refill/Access Decoupling for Vector Machines.Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic
2003HotOSHardware Works, Software Doesn't: Enforcing Modularity with Mondriaan Memory Protection.Emmett Witchel, Krste Asanovic
2003ISCABanked Multiported Register Files for High-Frequency Superscalar Microprocessors.Jessica H. Tseng, Krste Asanovic
2003ISLPEDReducing power density through activity migration.Seongmoo Heo, Kenneth C. Barr, Krste Asanovic
2003MobisysEnergy Aware Lossless Data Compression.Kenneth C. Barr, Krste Asanovic
2002ASPLOSMondrian memory protection.Emmett Witchel, Josh Cates, Krste Asanovic
2002ISCADynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines.Seongmoo Heo, Kenneth C. Barr, Mark Hampton, Krste Asanovic
2002ISLPEDFine-grain CAM-tag cache resizing using miss tags.Michael Zhang, Krste Asanovic
2001CASESHeads and tails: a variable-length instruction format supporting parallel fetch and decode.Heidi Pan, Krste Asanovic
2001MICRODirect addressed caches for reduced power consumption.Emmett Witchel, Samuel Larsen, C. Scott Ananian, Krste Asanovic
2000MICRODynamic zero compression for cache energy reduction.Luis Villa, Michael Zhang, Krste Asanovic
1997ICASSPUsing PHiPAC to speed error back-propagation learning.Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel
1997ICCDIntelligent RAM (IRAM): The Industrial Setting, Applications and Architectures.David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David R. Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick
1997ICSOptimizing Matrix Multiply Using PHiPAC: A Portable, High-Performance, ANSI C Coding Methodology.Jeff A. Bilmes, Krste Asanovic, Chee-Whye Chin, James Demmel
1997IWANNA Fast Kohonen Net Implementation for Spert-II.Krste Asanovic