Maha Kooli
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
16
Venues
9
Active years
2016–2026
Best venue rank
A*
Where they publish
Papers
16 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | VTS | Enhancing Testability & Security of Near-Memory Computing Architectures. | Hichem Benamara, Sabrina Ait Belkacem, Maria Ramirez-Corrales, Lorenzo Ciampolini, Jean-Philippe Noel, Maha Kooli, Lila Ammoura, Ian O'Connor, Patrick Girard, Arnaud Virazel |
| 2024 | DAC | Invited: Neuromorphic Vision Modalities in the NimbleAI 3D Chip. | Xabier Iturbe, Bernab Linares-Barranco, Sio-Hoi Ieng, Arne Erdmann, Luca Peres, Oliver Rhodes, Rafael Tornero, Manolis Sifalakis, Marcel D. van de Burgwal, Amirreza Yousefzadeh, Maha Kooli, Riccardo Alidori, Pavel Zaykov |
| 2023 | DATE | NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips. | Xabier Iturbe, Nassim Abderrahmane, Jaume Abella, Sergi Alcaide, Eric Beyne, Henri-Pierre Charles, Christelle Charpin-Nicolle, Lars Chittka, Anglica Dvila, Arne Erdmann, Carles Estrada, Ander Fernndez, Anna Fontanelli, Jos Flich, Gianluca Furano, Alejandro Hernn Gloriani, Erik Isusquiza, Radu Grosu, Carles Hernndez, Daniele Ielmini, David Jackson, Maha Kooli, Nicola Lepri, Bernab Linares-Barranco, Jean-Loup Lachese, Eric Laurent, Menno Lindwer, Frank Linsenmaier, Mikel Lujn, Karel Masark, Nele Mentens, Orlando Moreira, Chinmay Nawghane, Luca Peres, Jean-Philippe Noel, Arash Pourtaherian, Christoph Posch, Peter Priller, Zdenek Prikryl, Felix Resch, Oliver Rhodes, Todor P. Stefanov, Moritz Storring, Michele Taliercio, Rafael Tornero, Marcel D. van de Burgwal, Geert Van der Plas, Elisa Vianello, Pavel Zaykov |
| 2021 | DATE | Storage Class Memory with Computing Row Buffer: A Design Space Exploration. | Valentin Egloff, Jean-Philippe Noel, Maha Kooli, Bastien Giraud, Lorenzo Ciampolini, Roman Gauchi, Csar Fuguet Tortolero, Eric Guthmuller, Mathieu Moreau, Jean-Michel Portal |
| 2021 | RSP | Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator. | Kevin Mambu, Henri-Pierre Charles, Julie Dumas, Maha Kooli |
| 2020 | DATE | Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. | Jean-Philippe Nol, Valentin Egloff, Maha Kooli, Roman Gauchi, Jean-Michel Portal, Henri-Pierre Charles, Pascal Vivet, Bastien Giraud |
| 2020 | ISLPED | Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization. | Roman Gauchi, Valentin Egloff, Maha Kooli, Jean-Philippe Nol, Bastien Giraud, Pascal Vivet, Subhasish Mitra, Henri-Pierre Charles |
| 2020 | SCOPES | Data-layout optimization based on memory-access-pattern analysis for source-code performance improvement. | Riyane Sid Lakhdar, Henri-Pierre Charles, Maha Kooli |
| 2019 | RSP | Toward Modeling Cache-Miss Ratio for Dense-Data-Access-Based Optimization. | Riyane Sid Lakhdar, Henri-Pierre Charles, Maha Kooli |
| 2018 | DATE | Smart instruction codes for in-memory computing architectures compatible with standard SRAM interfaces. | Maha Kooli, Henri-Pierre Charles, Clment Touzet, Bastien Giraud, Jean-Philippe Noel |
| 2017 | IOLTS | Reliability of computing systems: From flip flops to variables. | Giorgio Di Natale, Maha Kooli, Alberto Bosio, Michele Portolan, Rgis Leveugle |
| 2017 | RSP | Software platform dedicated for in-memory computing circuit evaluation. | Maha Kooli, Henri-Pierre Charles, Clment Touzet, Bastien Giraud, Jean-Philippe Nol |
| 2016 | DDECS | System-level reliability evaluation through cache-aware software-based fault injection. | Firas Kaddachi, Maha Kooli, Giorgio Di Natale, Alberto Bosio, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori |
| 2016 | IOLTS | Cache-aware reliability evaluation through LLVM-based analysis and fault injection. | Maha Kooli, Giorgio Di Natale, Alberto Bosio |
| 2016 | ITC | Cross-layer system reliability assessment framework for hardware faults. | Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio Gonzlez, Maha Kooli, Alberto Bosio, Giorgio Di Natale |
| 2016 | VTS | Cache- and register-aware system reliability evaluation based on data lifetime analysis. | Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio |