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Mario Porrmann

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

36

Venues

17

Active years

1997–2025

Best venue rank

A*

Where they publish

Papers

36 indexed papers, newest first.

YearVenueTitleAuthors
2025IWANNHigh-Performance FPGA-Based CNN Acceleration for Real-Time DC Arc Fault Detection.Yu Li, Yufei Mao, Roland Weiss, Mario Porrmann
2025IWANNResource-Efficient Implementation of Convolutional Neural Networks on FPGAs with STANN.Yu Li, Marc Rothmann, Mario Porrmann
2023DATEEvaluation of heterogeneous AIoT Accelerators within VEDLIoT.Ren Griessl, Florian Porrmann, Nils Kucza, Kevin Mika, Jens Hagemeyer, Martin Kaiser, Mario Porrmann, Marco Tassemeier, Marcel Flottmann, Fareed Qararyah, Muhammad Waqar Azhar, Pedro Trancoso, Daniel dman, Karol Gugala, Grzegorz Latosinski
2023IWANNSTANN - Synthesis Templates for Artificial Neural Network Inference and Training.Marc Rothmann, Mario Porrmann
2022DATEVEDLIoT: Very Efficient Deep Learning in IoT.Martin Kaiser, Ren Griessl, Nils Kucza, Carola Haumann, Lennart Tigges, Kevin Mika, Jens Hagemeyer, Florian Porrmann, Ulrich Rckert, Micha vor dem Berge, Stefan Krupop, Mario Porrmann, Marco Tassemeier, Pedro Trancoso, Fareed Qararyah, Stavroula Zouzoula, Antnio Casimiro, Alysson Neves Bessani, Jos Ceclio, Stefan Andersson, Oliver Brunnegrd, Olof Eriksson, Roland Weiss, Franz Meierhfer, Hans Salomonsson, Elaheh Malekzadeh, Daniel dman, Anum Khurshid, Pascal Felber, Marcelo Pasin, Valerio Schiavoni, Jmes Mntrey, Karol Gugala, Piotr Zierhoffer, Eric Knauss, Hans-Martin Heyn
2018IPINAn Analytical Study of Time of Flight Error Estimation in Two-Way Ranging Methods.Cung Lian Sang, Michael Adams, Timm Hormann, Marc Hesse, Mario Porrmann, Ulrich Rckert
2017IJCNNFrom CPU to FPGA - Acceleration of self-organizing maps for data mining.Jan Lachmair, Thomas Mieth, Ren Griessl, Jens Hagemeyer, Mario Porrmann
2016DSDThe M2DC Project: Modular Microserver DataCentre.Mariano Cecowski, Giovanni Agosta, Ariel Oleksiak, Michal Kierzynka, Micha vor dem Berge, Wolfgang Christmann, Stefan Krupop, Mario Porrmann, Jens Hagemeyer, Ren Griessl, Meysam Peykanu, Lennart Tigges, Sven Rosinger, Daniel Schlitt, Christian Pieper, Carlo Brandolese, William Fornaciari, Gerardo Pelosi, Robert Plestenjak, Justin Cinkelj, Loc Cudennec, Thierry Goubier, Jean-Marc Philippe, Udo Janssen, Chris Adeniyi-Jones
2015ISCASEvaluation of interconnect fabrics for an embedded MPSoC in 28 nm FD-SOI.Gregor Sievers, Johannes Ax, Nils Kucza, Martin Flasskamp, Thorsten Jungeblut, Wayne Kelly, Mario Porrmann, Ulrich Rckert
2015MICROSystem-Level Analysis of Network Interfaces for Hierarchical MPSoCs.Johannes Ax, Gregor Sievers, Martin Flasskamp, Wayne Kelly, Thorsten Jungeblut, Mario Porrmann
2014ETSReconfigurable high performance architectures: How much are they ready for safety-critical applications?Davide Sabena, Luca Sterpone, Mario Schlzel, Tobias Koal, Heinrich Theodor Vierhaus, S. Wong, Robrt Glein, Florian Rittner, C. Stender, Mario Porrmann, Jens Hagemeyer
2014EUCA Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters.Ren Griessl, Meysam Peykanu, Jens Hagemeyer, Mario Porrmann, Stefan Krupop, Micha vor dem Berge, Thomas Kiesel, Wolfgang Christmann
2014EUCCoreVA: A Configurable Resource-Efficient VLIW Processor Architecture.Boris Hbener, Gregor Sievers, Thorsten Jungeblut, Mario Porrmann, Ulrich Rckert
2013DATEOn-line testing of permanent radiation effects in reconfigurable systems.Luca Cassano, Dario Cozzi, Sebastian Korf, Jens Hagemeyer, Mario Porrmann, Luca Sterpone
2012ESANNgNBXe - a Reconfigurable Neuroprocessor for Various Types of Self-Organizing Maps.Jan Lachmair, Erzsbet Mernyi, Mario Porrmann, Ulrich Rckert
2012ISCASA TCMS-based architecture for GALS NoCs.Thorsten Jungeblut, Johannes Ax, Mario Porrmann, Ulrich Rckert
2011FCCMAutomatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs.Sebastian Korf, Dario Cozzi, Markus Koester, Jens Hagemeyer, Mario Porrmann, Ulrich Rckert, Marco D. Santambrogio
2011MASCOTSEvaluation of Applied Intra-disk Redundancy Schemes to Improve Single Disk Reliability.Matthias Grawinkel, Thorsten Schfer, Andr Brinkmann, Jens Hagemeyer, Mario Porrmann
2010ISCASHigh level specification of embedded listeners for monitoring of Network-on-Chips.Christoph Puttmann, Mario Porrmann, Paolo Roberto Grassi, Marco D. Santambrogio, Ulrich Rckert
2009DATEDesign optimizations to improve placeability of partial reconfiguration modules.Markus Koester, Wayne Luk, Jens Hagemeyer, Mario Porrmann
2008DATEPower Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography.Madhura Purnaprajna, Christoph Puttmann, Mario Porrmann
2007DSDGigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors.Christoph Puttmann, Jrg-Christian Niemann, Mario Porrmann, Ulrich Rckert
2007FPLA Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAs.Jens Hagemeyer, Boris Kettelhoit, Markus Koester, Mario Porrmann
2007ISCASA design framework for FPGA-based dynamically reconfigurable digital controllers.Carlos Paiz, Boris Kettelhoit, Mario Porrmann
2006FPLA Layer Model for Systematically Designing Dynamically Reconfigurable Systems.Boris Kettelhoit, Mario Porrmann
2006ICINCOReconfigurable hardware in-the-loop simulations for digital control design.Carlos Paiz, Christopher Pohl, Mario Porrmann
2006ISCASBio-inspired massively parallel architectures for nanotechnologies.Bjrn Jger, Mario Porrmann, Ulrich Rckert
2005FPLContext Saving and Restoring for Multitasking in Reconfigurable Systems.Heiko Kalte, Mario Porrmann
2004DATEA Mapping Strategy for Resource-Efficient Network Processing on Multiprocessor SoC.Matthias Grnewald, Jrg-Christian Niemann, Mario Porrmann, Ulrich Rckert
2004FPLHardware Support for Dynamic Reconfiguration in Reconfigurable SoC Architectures.Bjrn Griese, Erik Vonnahme, Mario Porrmann, Ulrich Rckert
2003LCNA holistic methodology for network processor design.Olaf Bonorden, Nikolaus Brls, Uwe Kastens, Dinh Khoi Le, Friedhelm Meyer auf der Heide, Jrg-Christian Niemann, Mario Porrmann, Ulrich Rckert, Adrian Slowik, Michael Thies
2002ESANNA reconfigurable SOM hardware accelerator.Mario Porrmann, Marc Franzmeier, Heiko Kalte, Ulf Witkowski, Ulrich Rckert
2002FPLDynamically Reconfigurable Hardware - A New Perspective for Neural Network Implementations.Mario Porrmann, Ulf Witkowski, Heiko Kalte, Ulrich Rckert
2002PDPImplementation of Artificial Neural Networks on a Reconfigurable Hardware Accelerator.Mario Porrmann, Ulf Witkowski, Heiko Kalte, Ulrich Rckert
2000PDPTAUsing a Dynamically Reconfigurable System to Accelerate Octree Based 3D Graphics.Heiko Kalte, Mario Porrmann, Ulrich Rckert
1997IWANNA High Performance SOFM Hardware-System.Stefan Rping, Mario Porrmann, Ulrich Rckert