Mark Horowitz
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
101
Venues
27
Active years
1986–2025
Best venue rank
A*
Where they publish
- A*DAC20 papers
- A*ISCA20 papers
- A*ASPLOS9 papers
- AICCAD8 papers
- A*MICRO7 papers
- ADATE6 papers
- CARITH4 papers
- BISPASS2 papers
- BICIP2 papers
- A*SIGCOMM2 papers
- A*CVPR2 papers
- BGLOBECOM2 papers
- CICCD2 papers
- AISLPED2 papers
- BFMCAD1 paper
- A*CAV1 paper
- ASC1 paper
- BMASS1 paper
- BEWSN1 paper
- UnrankedSENSYS1 paper
- AICS1 paper
- BFPL1 paper
- NationalVLSID1 paper
- A*SP1 paper
- A*SOSP1 paper
- CISCAS1 paper
- AITC1 paper
Papers
101 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DATE | Application of Formal Methods (SAT/SMT) to the Design of Constrained Codes. | Sunil Sudhakaran, Clark W. Barrett, Mark Horowitz |
| 2025 | MICRO | A Probabilistic Perspective on Tiling Sparse Tensor Algebra. | Ritvik Sharma, Zi Yu Xue, Nathan Zhang, Rubens Lacouture, Fredrik Kjolstad, Sara Achour, Mark Horowitz |
| 2024 | ISPASS | Vision Transformer Computation and Resilience for Dynamic Inference. | Kavya Sreedhar, Jason Clemons, Rangharajan Venkatesan, Stephen W. Keckler, Mark Horowitz |
| 2022 | DAC | mflowgen: a modular flow generator and ecosystem for community-driven physical design: invited. | Alex Carsello, James Thomas, Ankita Nayak, Po-Han Chen, Mark Horowitz, Priyanka Raina, Christopher Torng |
| 2022 | DAC | Bringing source-level debugging frameworks to hardware generators. | Keyi Zhang, Zain Asgar, Mark Horowitz |
| 2021 | FMCAD | Automating System Configuration. | Nestan Tsiskaridze, Maxwell Strange, Makai Mann, Kavya Sreedhar, Qiaoyi Liu, Mark Horowitz, Clark W. Barrett |
| 2020 | ASPLOS | Interstellar: Using Halide's Scheduling Language to Analyze DNN Accelerators. | Xuan Yang, Mingyu Gao, Qiaoyi Liu, Jeff Setter, Jing Pu, Ankita Nayak, Steven Bell, Kaidi Cao, Heonjae Ha, Priyanka Raina, Christos Kozyrakis, Mark Horowitz |
| 2020 | CAV | fault: A Python Embedded Domain-Specific Language for Metaprogramming Portable Hardware Verification Components. | Lenny Truong, Steven Herbst, Rajsekhar Setaluri, Makai Mann, Ross G. Daly, Keyi Zhang, Caleb Donovick, Daniel Stanley, Mark Horowitz, Clark W. Barrett, Pat Hanrahan |
| 2020 | DAC | Creating an Agile Hardware Design Flow. | Rick Bahr, Clark W. Barrett, Nikhil Bhagdikar, Alex Carsello, Ross Daly, Caleb Donovick, David Durst, Kayvon Fatahalian, Kathleen Feng, Pat Hanrahan, Teguh Hofstee, Mark Horowitz, Dillon Huff, Fredrik Kjolstad, Taeyoung Kong, Qiaoyi Liu, Makai Mann, Jackson Melchert, Ankita Nayak, Aina Niemetz, Gedeon Nyengele, Priyanka Raina, Stephen Richardson, Rajsekhar Setaluri, Jeff Setter, Kavya Sreedhar, Maxwell Strange, James Thomas, Christopher Torng, Leonard Truong, Nestan Tsiskaridze, Keyi Zhang |
| 2020 | DATE | A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs. | Ankita Nayak, Keyi Zhang, Rajsekhar Setaluri, Alex Carsello, Makai Mann, Stephen Richardson, Rick Bahr, Pat Hanrahan, Mark Horowitz, Priyanka Raina |
| 2020 | SC | SegAlign: a scalable GPU-based whole genome aligner. | Sneha D. Goenka, Yatish Turakhia, Benedict Paten, Mark Horowitz |
| 2019 | ASPLOS | TANGRAM: Optimized Coarse-Grained Dataflow for Scalable NN Accelerators. | Mingyu Gao, Xuan Yang, Jing Pu, Mark Horowitz, Christos Kozyrakis |
| 2019 | ICIP | Dataset Culling: Towards Efficient Training of Distillation-Based Domain Specific Models. | Kentaro Yoshioka, Edward Lee, Simon Wong, Mark Horowitz |
| 2019 | MASS | Falcon - A Flexible Architecture For Accelerating Cryptography. | Kevin Kiningham, Philip Alexander Levis, Mark Anderson, Dan Boneh, Mark Horowitz, Maurice Shih |
| 2018 | ICCAD | Fast FPGA emulation of analog dynamics in digitally-driven systems. | Steven Herbst, ByongChan Lim, Mark Horowitz |
| 2017 | ASPLOS | TETRIS: Scalable and Efficient Neural Network Acceleration with 3D Memory. | Mingyu Gao, Jing Pu, Xuan Yang, Mark Horowitz, Christos Kozyrakis |
| 2016 | EWSN | CESEL: Securing a Mote for 20 Years. | Kevin Kiningham, Mark Horowitz, Philip Alexander Levis, Dan Boneh |
| 2016 | MICRO | Improving energy efficiency of DRAM by exploiting half page row access. | Heonjae Ha, Ardavan Pedram, Stephen Richardson, Shahar Kvatinsky, Mark Horowitz |
| 2016 | MICRO | Evaluating programmable architectures for imaging and vision applications. | Artem Vasilyev, Nikhil Bhagdikar, Ardavan Pedram, Stephen Richardson, Shahar Kvatinsky, Mark Horowitz |
| 2015 | ICIP | Scale- and orientation-invariant keypoints in higher-dimensional data. | Blaine Rister, Daniel Reiter, Hejia Zhang, Daniel Volz, Mark Horowitz, Refaat E. Gabr, Joseph R. Cavallaro |
| 2015 | SENSYS | Demo: Tethys - An Energy Harvesting Networked Water Flow Sensor. | Holly Chiang, James Hong, Kevin Kiningham, Jiaqi Xue, Laurynas Riliskis, Philip Alexander Levis, Mark Horowitz |
| 2013 | ARITH | FPU Generator for Design Space Exploration. | Sameh Galal, Ofer Shacham, John S. Brunhaver, Jing Pu, Artem Vassiliev, Mark Horowitz |
| 2013 | SIGCOMM | Forwarding metamorphosis: fast programmable match-action processing in hardware for SDN. | Pat Bosshart, Glen Gibb, Hun-Seok Kim, George Varghese, Nick McKeown, Martin Izzard, Fernando A. Mujica, Mark Horowitz |
| 2012 | DAC | Removing overhead from high-level interfaces. | Kyle Kelley, Megan Wachs, John P. Stevenson, Stephen Richardson, Mark Horowitz |
| 2012 | DAC | Avoiding game over: bringing design to the next level. | Ofer Shacham, Sameh Galal, Sabarish Sankaranarayanan, Megan Wachs, John S. Brunhaver, Artem Vassiliev, Mark Horowitz, Andrew Danowitz, Wajahat Qadeer, Stephen Richardson |
| 2012 | ISCA | Towards energy-proportional datacenter memory with mobile DRAM. | Krishna T. Malladi, Frank A. Nothaft, Karthika Periyathambi, Benjamin C. Lee, Christos Kozyrakis, Mark Horowitz |
| 2012 | ICS | Sparse matrix-vector multiply on the HICAMP architecture. | John P. Stevenson, Amin Firoozshahian, Alex Solomatnikov, Mark Horowitz, David R. Cheriton |
| 2012 | MICRO | Rethinking DRAM Power Modes for Energy Proportionality. | Krishna T. Malladi, Ian Shaeffer, Liji Gopalakrishnan, David Lo, Benjamin C. Lee, Mark Horowitz |
| 2011 | ARITH | Latency Sensitive FMA Design. | Sameh Galal, Mark Horowitz |
| 2011 | DAC | Joint DAC/IWBDA special session design and synthesis of biological circuits. | Douglas Densmore, Mark Horowitz, Smita Krishnaswamy, Xiling Shen, Adam P. Arkin, Erik Winfree, Chris Voigt |
| 2011 | DAC | Global convergence analysis of mixed-signal systems. | Sangho Youn, Jaeha Kim, Mark Horowitz |
| 2011 | DATE | Intermediate representations for controllers in chip generators. | Kyle Kelley, Megan Wachs, Andrew Danowitz, P. Stevenson, Stephen Richardson, Mark Horowitz |
| 2010 | DAC | Fortifying analog models with equivalence checking and coverage analysis. | Mark Horowitz, Metha Jeeradit, Frances Lau, Sabrina Liao, ByongChan Lim, James Mao |
| 2010 | DATE | An integrated framework for joint design space exploration of microarchitecture and circuits. | Omid Azizi, Aqeel Mahesri, John P. Stevenson, Sanjay J. Patel, Mark Horowitz |
| 2010 | DATE | Why design must change: Rethinking digital design. | Mark Horowitz |
| 2010 | DATE | Intent-leveraged optimization of analog circuits via homotopy. | Metha Jeeradit, Jaeha Kim, Mark Horowitz |
| 2010 | ISCA | Energy-performance tradeoffs in processor architecture and circuit design: a marginal cost analysis. | Omid Azizi, Aqeel Mahesri, Benjamin C. Lee, Sanjay J. Patel, Mark Horowitz |
| 2010 | ISCA | Understanding sources of inefficiency in general-purpose chips. | Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, Mark Horowitz |
| 2009 | FPL | In field, energy-performance tunable FPGA architectures. | Bita Nezamfar, Mark Horowitz |
| 2009 | ISCA | A memory system design framework: creating smart memories. | Amin Firoozshahian, Alex Solomatnikov, Ofer Shacham, Zain Asgar, Stephen Richardson, Christos Kozyrakis, Mark Horowitz |
| 2009 | MICRO | Why design must change: rethinking digital design. | Mark Horowitz |
| 2009 | MICRO | Using a configurable processor generator for computer architecture prototyping. | Alex Solomatnikov, Amin Firoozshahian, Ofer Shacham, Zain Asgar, Megan Wachs, Wajahat Qadeer, Stephen Richardson, Mark Horowitz |
| 2008 | ASPLOS | The case for simple, visible cache coherency. | Robert Kunz, Mark Horowitz |
| 2008 | ISPASS | Processor Performance Modeling using Symbolic Simulation. | Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz |
| 2008 | MICRO | Verification of chip multiprocessor memory systems using a relaxed scoreboard. | Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin Firoozshahian, Stephen Richardson, Mark Horowitz |
| 2007 | ARITH | Robust Energy-Efficient Adder Topologies. | Dinesh Patil, Omid Azizi, Mark Horowitz, Ron Ho, Rajesh Ananthraman |
| 2007 | DAC | Chip Multi-Processor Generator. | Alex Solomatnikov, Amin Firoozshahian, Wajahat Qadeer, Ofer Shacham, Kyle Kelley, Zain Asgar, Megan Wachs, Rehan Hameed, Mark Horowitz |
| 2007 | ISCA | Comparing memory systems for chip multiprocessors. | Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis |
| 2007 | VLSID | Scaling, Power and the Future of CMOS. | Mark Horowitz |
| 2005 | CVPR | Synthetic Aperture Focusing using a Shear-Warp Factorization of the Viewing Transform. | Vaibhav Vaish, Gaurav Garg, Eino-Ville Talvala, Emilio R. Antnez, Bennett Wilburn, Mark Horowitz, Marc Levoy |
| 2004 | CVPR | High-Speed Videography Using a Dense Camera Array. | Bennett Wilburn, Neel Joshi, Vaibhav Vaish, Marc Levoy, Mark Horowitz |
| 2004 | GLOBECOM | Equalization of modal dispersion in multimode fiber using spatial light modulators. | Elad Alon, Vladimir Stojanovic, Joseph M. Kahn, Stephen P. Boyd, Mark Horowitz |
| 2003 | DAC | Design of a 10GHz clock distribution network using coupled standing-wave oscillators. | Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong |
| 2003 | DAC | Reshaping EDA for power. | Jan M. Rabaey, Dennis Sylvester, David T. Blaauw, Kerry Bernstein, Jerry Frenkil, Mark Horowitz, Wolfgang Nebel, Takayasu Sakurai, Andrew Yang |
| 2003 | ICCAD | A Framework for Designing Reusable Analog Circuits. | Dean Liu, Stefanos Sidiropoulos, Mark Horowitz |
| 2003 | ICCD | High-Speed Link Design, Then and Now. | Mark Horowitz |
| 2003 | SIGCOMM | Scaling internet routers using optics. | Isaac Keslassy, Shang-Tse Chuang, Kyoungsik Yu, David A. B. Miller, Mark Horowitz, Olav Solgaard, Nick McKeown |
| 2003 | SP | Specifying and Verifying Hardware for Tamper-Resistant Software. | David Lie, John C. Mitchell, Chandramohan A. Thekkath, Mark Horowitz |
| 2003 | SOSP | Implementing an untrusted operating system on trusted hardware. | David Lie, Chandramohan A. Thekkath, Mark Horowitz |
| 2002 | ICCAD | Methods for true power minimization. | Robert W. Brodersen, Mark Horowitz, Dejan Markovic, Borivoje Nikolic, Vladimir Stojanovic |
| 2001 | DAC | Using Texture Mapping with Mipmapping to Render a VLSI Layout. | Jeff Solomon, Mark Horowitz |
| 2001 | GLOBECOM | Optimizing iterative decoding of low-density parity check codes on programmable pipelined parallel architectures. | Ghazi Al-Rawi, John M. Cioffi, Rajeev Motwani, Mark Horowitz |
| 2001 | ISCAS | Sampling-rate optimization of an interleaved-sampling front-end. | Henrik O. Johansson, Mark Horowitz |
| 2000 | ASPLOS | Architectural Support for Copy and Tamper Resistant Software. | David Lie, Chandramohan A. Thekkath, Mark Mitchell, Patrick Lincoln, Dan Boneh, John C. Mitchell, Mark Horowitz |
| 2000 | DAC | Life at the end of CMOS scaling (and beyond) (panel session) (abstract only). | Rob A. Rutenbar, Cheming Hu, Mark Horowitz, Stephen Y. Chow |
| 2000 | ISCA | Smart Memories: a modular reconfigurable architecture. | Ken Mai, Tim Paaske, Nuwan Jayasena, Ron Ho, William J. Dally, Mark Horowitz |
| 1999 | DAC | Vex - A CAD Toolbox. | Jules P. Bergmann, Mark Horowitz |
| 1999 | DAC | Using Partitioning to Help Convergence in the Standard-Cell Design Automation Methodology. | Hema Kapadia, Mark Horowitz |
| 1999 | ICCAD | Improving coverage analysis and test generation for large designs. | Jules P. Bergmann, Mark Horowitz |
| 1999 | ICCAD | Interconnect scaling implications for CAD. | Ron Ho, Ken Mai, Hema Kapadia, Mark Horowitz |
| 1998 | DAC | Approximate Reachability with BDDs Using Overlapping Projections. | Shankar G. Govindaraju, David L. Dill, Alan J. Hu, Mark Horowitz |
| 1998 | ISCA | An Evaluation of Directory Schemes for Cache Coherence. | Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz |
| 1998 | ISCA | The Stanford FLASH Multiprocessor. | Jeffrey Kuskin, David Ofelt, Mark A. Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy |
| 1997 | ARITH | SRT Division Architectures and Implementations. | David L. Harris, Stuart F. Oberman, Mark Horowitz |
| 1997 | ISCA | Hardware Fault Containment in Scalable Shared-Memory Multiprocessors. | Dan Teodosiu, Joel Baxter, Kinshuk Govil, John Chapin, Mendel Rosenblum, Mark Horowitz |
| 1996 | ICCAD | Validation coverage analysis for complex digital designs. | Richard C. Ho, Mark Horowitz |
| 1996 | ISCA | Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors. | Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith |
| 1996 | ISLPED | A low power switching power supply for self-clocked systems. | Gu-Yeon Wei, Mark Horowitz |
| 1995 | ISCA | Architecture Validation for Processors. | Richard C. Ho, C. Han Yang, Mark Horowitz, David L. Dill |
| 1995 | ISLPED | Clustered voltage scaling technique for low-power design. | Kimiyoshi Usami, Mark Horowitz |
| 1994 | ASPLOS | The Performance Impact of Flexibility in the Stanford FLASH Multiprocessor. | Mark A. Heinrich, Jeffrey Kuskin, David Ofelt, John Heinlein, Joel Baxter, Jaswinder Pal Singh, Richard Simoni, Kourosh Gharachorloo, David Nakahira, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy |
| 1994 | ASPLOS | Interleaving: A Multithreading Technique Targeting Multiprocessors and Workstations. | James Laudon, Anoop Gupta, Mark Horowitz |
| 1994 | ISCA | The Stanford FLASH Multiprocessor. | Jeffrey Kuskin, David Ofelt, Mark A. Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy |
| 1994 | ITC | Techniques for Characterizing DRAMs With a 500-MHz Interface. | James A. Gasbarro, Mark Horowitz |
| 1993 | ICCAD | Piecewise linear models for Rsim. | Russell Kao, Mark Horowitz |
| 1992 | ASPLOS | Efficient Superscalar Performance Through Boosting. | Michael D. Smith, Mark Horowitz, Monica S. Lam |
| 1992 | ISCA | Architectural and implementation tradeoffs in the design of multiple-context processors. | James Laudon, Anoop Gupta, Mark Horowitz |
| 1991 | ICCD | Self-Timed Logic Using Current-Sensing Completion Detection (CSCD). | Mark E. Dean, David L. Dill, Mark Horowitz |
| 1991 | ISCA | Modeling the Performance of Limited Pointers Directories for Cache Coherence. | Richard Simoni, Mark Horowitz |
| 1990 | ISCA | Boosting Beyond Static Scheduling in a Superscalar Processor. | Michael D. Smith, Monica S. Lam, Mark Horowitz |
| 1989 | ASPLOS | Limits on Multiple Instruction Issue. | Michael D. Smith, Mike Johnson, Mark Horowitz |
| 1989 | DAC | IRSIM: An Incremental MOS Switch-Level Simulator. | A. Salz, Mark Horowitz |
| 1989 | ISCA | Characteristics of Performance-Optimal Multi-Level Cache Hierarchies. | Steven A. Przybylski, Mark Horowitz, John L. Hennessy |
| 1988 | DAC | Analyzing CMOS Power Supply Networks Using Ariel. | Don Stark, Mark Horowitz |
| 1988 | ICCAD | Bisim: a simulator for custom ECL circuits. | Russell Kao, Bob Alverson, Mark Horowitz, Don Stark |
| 1988 | ISCA | An Evaluation of Directory Schemes for Cache Coherence. | Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz |
| 1988 | ISCA | Performance Tradeoffs in Cache Design. | Steven A. Przybylski, Mark Horowitz, John L. Hennessy |
| 1987 | DAC | Generating Incremental VLSI Compaction Spacing Constraints. | Clyde W. Carpenter, Mark Horowitz |
| 1987 | DAC | RED: Resistance Extraction for Digital Simulation. | Don Stark, Mark Horowitz |
| 1987 | ISCA | Architectural Tradeoffs in the Design of MIPS-X. | Paul Chow, Mark Horowitz |
| 1986 | ISCA | ATUM: A New Technique for Capturing Address Traces Using Microcode. | Anant Agarwal, Richard L. Sites, Mark Horowitz |