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Martin D. F. Wong

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

146

Venues

12

Active years

1988–2026

Best venue rank

A*

Where they publish

Papers

146 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPDACCausalTuner: Will Causality Help High-Dimensional EDA Tool Parameter Tuning.Ziyang Yu, Peng Xu, Su Zheng, Siyuan Xu, Hao Geng, Bei Yu, Martin D. F. Wong
2026DATEScalable Second-Order Optimizer for Full-Chip Inverse Lithography Techniques.Su Zheng, Ziyang Yu, Bei Yu, Martin D. F. Wong
2025DACSDM-PEB: Spatial-Depthwise Mamba for Enhanced Post-Exposure Bake Simulation.Ziyang Yu, Peng Xu, Zixiao Wang, Binwu Zhu, Qipan Wang, Yibo Lin, Runsheng Wang, Bei Yu, Martin D. F. Wong
2025DACCurvilinear Optical Proximity Correction via Cardinal Spline.Su Zheng, Xiaoxiao Liang, Ziyang Yu, Yuzhe Ma, Bei Yu, Martin D. F. Wong
2025DATEFast Dynamic IR-Drop Prediction with Dual-Path Spatial-Temporal Attention.Bangqi Fu, Lixin Liu, Qijing Wang, Yutao Wang, Martin D. F. Wong, Evangeline F. Y. Young
2025FPLTRPlaceFPGA-MP: A Two-Stage Reinforcement Learning Framework for Fast FPGA Macro Placer.Qin Luo, Xinshi Zang, Evangeline F. Y. Young, Martin D. F. Wong
2025KSEMPOAgent: A Multi-agent Controller Towards Adaptive Parameter Optimization.Qijing Wang, Martin D. F. Wong, Evangeline F. Y. Young
2024AAAITowards Automated RISC-V Microarchitecture Design with Reinforcement Learning.Chen Bai, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D. F. Wong
2024ASPDACCoPlace: Coherent Placement Engine with Layout-aware Partitioning for 3D ICs.Bangqi Fu, Lixin Liu, Yang Sun, Wing Ho Lau, Martin D. F. Wong, Evangeline F. Y. Young
2024DACGCS-Timer: GPU-Accelerated Current Source Model Based Static Timing Analysis.Shiju Lin, Guannan Guo, Tsung-Wei Huang, Weihua Sheng, Evangeline F. Y. Young, Martin D. F. Wong
2024DACMassively Parallel AIG Resubstitution.Yang Sun, Tianji Liu, Martin D. F. Wong, Evangeline F. Y. Young
2024DACEMOGen: Enhancing Mask Optimization via Pattern Generation.Su Zheng, Yuzhe Ma, Bei Yu, Martin D. F. Wong
2024FCCMA Routability-Driven Ultrascale FPGA Macro Placer with Complex Design Constraints.Qin Luo, Xinshi Zang, Qijing Wang, Fangzhou Wang, Evangeline F. Y. Young, Martin D. F. Wong
2024ICCADHybrid Modeling and Weighting for Timing-driven Placement with Efficient Calibration.Bangqi Fu, Lixin Liu, Martin D. F. Wong, Evangeline F. Y. Young
2023DACPhysics-Informed Optical Kernel Regression Using Complex-valued Neural Fields.Guojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu, Martin D. F. Wong
2023DACOn a Moreau Envelope Wirelength Model for Analytical Global Placement.Peiyu Liao, Hongduo Liu, Yibo Lin, Bei Yu, Martin D. F. Wong
2023DACConcurrent Sign-off Timing Optimization via Deep Steiner Points Refinement.Siting Liu, Ziyi Wang, Fangzhou Liu, Yibo Lin, Bei Yu, Martin D. F. Wong
2023DACMitigating Distribution Shift for Congestion Optimization in Global Placement.Su Zheng, Lancheng Zou, Siting Liu, Yibo Lin, Bei Yu, Martin D. F. Wong
2023DATEFast STA Graph Partitioning Framework for Multi-GPU Acceleration.Guannan Guo, Tsung-Wei Huang, Martin D. F. Wong
2023ICCADIT-DSE: Invariance Risk Minimized Transfer Microarchitecture Design Space Exploration.Ziyang Yu, Chen Bai, Shoubo Hu, Ran Chen, Taohai He, Mingxuan Yuan, Bei Yu, Martin D. F. Wong
2023ICCADLay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction.Su Zheng, Lancheng Zou, Peng Xu, Siting Liu, Bei Yu, Martin D. F. Wong
2023ICCADMulti-Product Optimization for 3D Heterogeneous Integration with D2W Bonding.Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong
2022DACNovelRewrite: node-level parallel AIG rewriting.Shiju Lin, Jinwei Liu, Tianji Liu, Martin D. F. Wong, Evangeline F. Y. Young
2022DACXplace: an extremely fast and extensible global placement framework.Lixin Liu, Bangqi Fu, Martin D. F. Wong, Evangeline F. Y. Young
2022DACPartition and place finite element model on wafer-scale engine.Jinwei Liu, Xiaopeng Zhang, Shiju Lin, Xinshi Zang, Jingsong Chen, Bentian Jiang, Martin D. F. Wong, Evangeline F. Y. Young
2022DACA2-ILT: GPU accelerated ILT with spatial attention mechanism.Qijing Wang, Bentian Jiang, Martin D. F. Wong, Evangeline F. Y. Young
2022ICCADSuperfast Full-Scale CPU-Accelerated Global Routing.Shiju Lin, Martin D. F. Wong
2022ICCADWaferHSL: Wafer Failure Pattern Classification with Efficient Human-Like Staged Learning.Qijing Wang, Martin D. F. Wong
2022ICCADATLAS: A Two-Level Layer-Aware Scheme for Routing with Cell Movement.Xinshi Zang, Fangzhou Wang, Jinwei Liu, Martin D. F. Wong
2022ICCADAdaOPC: A Self-Adaptive Mask Optimization Framework for Real Design Patterns.Wenqian Zhao, Xufeng Yao, Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu, Martin D. F. Wong
2021DACGPU-accelerated Path-based Timing Analysis.Guannan Guo, Tsung-Wei Huang, Yibo Lin, Martin D. F. Wong
2021ICCADBOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework.Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D. F. Wong
2021ICCADGPU-accelerated Critical Path Generation with Path Constraints.Guannan Guo, Tsung-Wei Huang, Yibo Lin, Martin D. F. Wong
2021ICCADGAMER: GPU Accelerated Maze Routing.Shiju Lin, Jinwei Liu, Martin D. F. Wong
2021ICCADStarfish: An Efficient P&R Co-Optimization Engine with A*-based Partial Rerouting.Fangzhou Wang, Lixin Liu, Jingsong Chen, Jinwei Liu, Xinshi Zang, Martin D. F. Wong
2021ICCADA High-Performance Accelerator for Super-Resolution Processing on Embedded GPU.Wenqian Zhao, Qi Sun, Yang Bai, Wenbo Li, Haisheng Zheng, Bei Yu, Martin D. F. Wong
2021ICCADTopoPart: a Multi-level Topology-Driven Partitioning Framework for Multi-FPGA Systems.Dan Zheng, Xinshi Zang, Martin D. F. Wong
2021ICCADHotspot Detection via Multi-task Learning and Transformer Encoder.Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin D. F. Wong
2020DACAn Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints.Guannan Guo, Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
2020ICCDLearn to Floorplan through Acquisition of Effective Local Search Heuristics.Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong
2020ICPADSAn Efficient Work-Stealing Scheduler for Task Dependency Graph.Chun-Xun Lin, Tsung-Wei Huang, Martin D. F. Wong
2019DACEssential Building Blocks for Creating an Open-source EDA Project.Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong
2019DACDistributed Timing Analysis at Scale.Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
2018ASPDACOn coloring rectangular and diagonal grid graphs for multiple patterning lithography.Daifeng Guo, Hongbo Zhang, Martin D. F. Wong
2018ASPDACA highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis.Tin-Yin Lai, Martin D. F. Wong
2018DATEAccelerate analytical placement with GPU: A generic approach.Chun-Xun Lin, Martin D. F. Wong
2017DACLibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs.Tin-Yin Lai, Tsung-Wei Huang, Martin D. F. Wong
2017ICCADDtCraft: A distributed execution engine for compute-intensive applications.Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
2016ASPDACContact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout.Zigang Xiao, Chun-Xun Lin, Martin D. F. Wong, Hongbo Zhang
2016DACA distributed timing analysis framework for large designs.Tsung-Wei Huang, Martin D. F. Wong, Debjit Sinha, Kerim Kalafala, Natesan Venkateswaran
2016DACInformation dispersion for trojan defense through high-level synthesis.S. T. Choden Konigsmark, Deming Chen, Martin D. F. Wong
2015ASPDACPolynomial time optimal algorithm for stencil row planning in e-beam lithography.Daifeng Guo, Yuelin Du, Martin D. F. Wong
2015ASPDACAn efficient linear time triple patterning solver.Haitong Tian, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong
2015ASPDACContact pitch and location prediction for Directed Self-Assembly template verification.Zigang Xiao, Yuelin Du, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang
2015DACLayout optimization and template pattern verification for directed self-assembly (DSA).Zigang Xiao, Daifeng Guo, Martin D. F. Wong, He Yi, Maryann C. Tung, H.-S. Philip Wong
2015ICCADOpenTimer: A High-Performance Timing Analysis Tool.Tsung-Wei Huang, Martin D. F. Wong
2014ASPDACCNPUF: A Carbon Nanotube-based Physically Unclonable Function for secure low-energy hardware design.S. T. Choden Konigsmark, Leslie Hwang, Deming Chen, Martin D. F. Wong
2014ASPDACEfficient simulation-based optimization of power grid with on-chip voltage regulator.Ting Yu, Martin D. F. Wong
2014DACOn Timing Closure: Buffer Insertion for Hold-Violation Removal.Pei-Ci Wu, Martin D. F. Wong, Ivailo Nedelchev, Sarvesh Bhardwaj, Vidyamani Parkhe
2014DACDirected Self-Assembly (DSA) Template Pattern Verification.Zigang Xiao, Yuelin Du, Haitong Tian, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang
2014DATEOptimization of standard cell based detailed placement for 16 nm FinFET process.Yuelin Du, Martin D. F. Wong
2014ICCADFast path-based timing analysis for CPPR.Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong
2014ICCADUI-timer: an ultra-fast clock network pessimism removal algorithm.Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong
2014ICCADTriple patterning aware detailed placement with constrained pattern assignment.Haitong Tian, Yuelin Du, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong
2013ASPDACLinear time algorithm to find all relocation positions for EUV defect mitigation.Yuelin Du, Hongbo Zhang, Qiang Ma, Martin D. F. Wong
2013ASPDACAn ILP-based automatic bus planner for dense PCBs.Pei-Ci Wu, Qiang Ma, Martin D. F. Wong
2013ASPDACNetwork flow modeling for escape routing on staggered pin arrays.Pei-Ci Wu, Martin D. F. Wong
2013DACSpacer-is-dielectric-compliant detailed routing for self-aligned double patterning lithography.Yuelin Du, Qiang Ma, Hua Song, James P. Shiely, Gerard Luk-Pat, Alexander Miloslavsky, Martin D. F. Wong
2013ICCADBlock copolymer directed self-assembly (DSA) aware contact layer optimization for 10 nm 1D standard cell library.Yuelin Du, Daifeng Guo, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang, Qiang Ma
2013ICCADConstrained pattern assignment for standard cell based triple patterning lithography.Haitong Tian, Yuelin Du, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong
2013ICCADEfficient aerial image simulation on multi-core SIMD CPU.Pei-Ci Wu, Tan Yan, Hongbo Zhang, Martin D. F. Wong
2013ICCADOptimally minimizing overlay violation in self-aligned double patterning decomposition for row-based standard cell layout in polynomial time.Zigang Xiao, Yuelin Du, Haitong Tian, Martin D. F. Wong
2012ASPDACHybrid lithography optimization with E-Beam and immersion processes for 16nm 1D gridded design.Yuelin Du, Hongbo Zhang, Martin D. F. Wong, Kai-Yuan Chao
2012ASPDACParallel implementation of R-trees on the GPU.Lijuan Luo, Martin D. F. Wong, Lance Leong
2012ASPDACEfficient pattern relocation for EUV blank defect mitigation.Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Rasit Onur Topaloglu
2012DACTriple patterning aware routing and its comparison with double patterning aware routing in 14nm technology.Qiang Ma, Hongbo Zhang, Martin D. F. Wong
2012ICCADA polynomial time triple patterning algorithm for cell based row-structure layout.Haitong Tian, Hongbo Zhang, Qiang Ma, Zigang Xiao, Martin D. F. Wong
2012ICCADPGT_SOLVER: An efficient solver for power grid transient analysis.Ting Yu, Martin D. F. Wong
2012ICCADEfficient parallel power grid analysis via Additive Schwarz Method.Ting Yu, Zigang Xiao, Martin D. F. Wong
2012ICCADLayout small-angle rotation and shift for EUV defect mitigation.Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Yunfei Deng, Pawitter Mangat
2011ASPDACA provably good approximation algorithm for Rectangle Escape Problem with application to PCB routing.Qiang Ma, Hui Kong, Martin D. F. Wong, Evangeline F. Y. Young
2011ASPDACRouting with graphene nanoribbons.Tan Yan, Qiang Ma, Scott Chilstedt, Martin D. F. Wong, Deming Chen
2011ASPDACMask cost reduction with circuit performance consideration for self-aligned double patterning.Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Kai-Yuan Chao
2011DACAn optimal algorithm for layer assignment of bus escape routing on PCBs.Qiang Ma, Evangeline F. Y. Young, Martin D. F. Wong
2011DACSelf-aligned double patterning decomposition for overlay minimization and hot spot detection.Hongbo Zhang, Yuelin Du, Martin D. F. Wong, Rasit Onur Topaloglu
2011ICCADAccelerating aerial image simulation with GPU.Hongbo Zhang, Tan Yan, Martin D. F. Wong, Sanjay J. Patel
2010ASPDACDynamic power estimation for deep submicron circuits with process variation.Quang Dinh, Deming Chen, Martin D. F. Wong
2010ASPDACOptimal simultaneous pin assignment and escape routing for dense PCBs.Hui Kong, Tan Yan, Martin D. F. Wong
2010ASPDACConfigurable multi-product floorplanning.Qiang Ma, Martin D. F. Wong, Kai-Yuan Chao
2010ASPDACOn process-aware 1-D standard cell design.Hongbo Zhang, Martin D. F. Wong, Kai-Yuan Chao
2010DACAn optimal algorithm for finding disjoint rectangles and its application to PCB routing.Hui Kong, Qiang Ma, Tan Yan, Martin D. F. Wong
2010DACAn effective GPU implementation of breadth-first search.Lijuan Luo, Martin D. F. Wong, Wen-mei W. Hwu
2010ICCADRecent research development in PCB layout.Tan Yan, Martin D. F. Wong
2010ICCADOn the escape routing of differential pairs.Tan Yan, Pei-Ci Wu, Qiang Ma, Martin D. F. Wong
2010ICCDBDD-based circuit restructuring for reducing dynamic power.Quang Dinh, Deming Chen, Martin D. F. Wong
2009ASPDACOn using SAT to ordered escape problems.Lijuan Luo, Martin D. F. Wong
2009DACFlip-chip routing with unified area-I/O pad assignments for package-board co-design.Jia-Wei Fang, Martin D. F. Wong, Yao-Wen Chang
2009DACAutomatic bus planner for dense PCBs.Hui Kong, Tan Yan, Martin D. F. Wong
2009DACThermal-driven analog placement considering device matching.Mark Po-Hung Lin, Hongbo Zhang, Martin D. F. Wong, Yao-Wen Chang
2009DACA correct network flow model for escape routing.Tan Yan, Martin D. F. Wong
2009ICCADOptimal layer assignment for escape routing of buses.Tan Yan, Hui Kong, Martin D. F. Wong
2008ASPDACOrdered escape routing based on Boolean satisfiability.Lijuan Luo, Martin D. F. Wong
2008FPGAEfficient ASIP design for configurable processors with fine-grained resource sharing.Quang Dinh, Deming Chen, Martin D. F. Wong
2008ICCADBSG-Route: a length-matching router for general topology.Tan Yan, Martin D. F. Wong
2007ASPDACCoupling-aware Dummy Metal Insertion for Lithography.Liang Deng, Martin D. F. Wong, Kai-Yuan Chao, Hua Xiang
2007ASPDACFast and Accurate OPC for Standard-Cell Layouts.David M. Pawlowski, Liang Deng, Martin D. F. Wong
2007ASPDACFast Placement Optimization of Power Supply Pads.Yu Zhong, Martin D. F. Wong
2007ASPDACEfficient Second-Order Iterative Methods for IR Drop Analysis in Power Grid.Yu Zhong, Martin D. F. Wong
2007DACGlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches.Lei Cheng, Deming Chen, Martin D. F. Wong
2007DACDDBDD: Delay-Driven BDD Synthesis for FPGAs.Lei Cheng, Deming Chen, Martin D. F. Wong
2007DACImproving Voltage Assignment by Outlier Detection and Incremental Placement.Huaizhi Wu, Martin D. F. Wong
2007ICCADTiming constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains.Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig
2007ICCADOptimal bus sequencing for escape routing in dense PCBs.Hui Kong, Tan Yan, Martin D. F. Wong, Muhammet Mustafa Ozdal
2007ICCADArcher: a history-driven global routing algorithm.Muhammet Mustafa Ozdal, Martin D. F. Wong
2007ICCADUntangling twisted nets for bus routing.Tan Yan, Martin D. F. Wong
2006ASPDACAn exact algorithm for the statistical shortest path problem.Liang Deng, Martin D. F. Wong
2006ASPDACClosed form solution for optimal buffer sizing using the Weierstrass elliptic function.Sebastian Vogel, Martin D. F. Wong
2006DACA fast simultaneous input vector generation and gate replacement algorithm for leakage power reduction.Lei Cheng, Liang Deng, Deming Chen, Martin D. F. Wong
2006DACTiming-constrained and voltage-island-aware voltage assignment.Huaizhi Wu, Martin D. F. Wong, I-Min Liu
2005ASPDACFloorplanning for 3-D VLSI design.Lei Cheng, Liang Deng, Martin D. F. Wong
2005ASPDACCrowdedness-balanced multilevel partitioning for uniform resource utilization.Yongseok Cheon, Martin D. F. Wong
2005ASPDACOptimal redistribution of white space for wire length minimization.Xiaoping Tang, Ruiqi Tian, Martin D. F. Wong
2005ASPDACRedundant-via enhanced maze routing for yield improvement.Gang Xu, Li-Da Huang, David Z. Pan, Martin D. F. Wong
2005ASPDACCMP aware shuttle mask floorplanning.Gang Xu, Ruiqi Tian, David Z. Pan, Martin D. F. Wong
2005ICCADBuffer insertion under process variations for delay minimization.Liang Deng, Martin D. F. Wong
2005ICCADAn escape routing framework for dense boards with high-speed design constraints.Muhammet Mustafa Ozdal, Martin D. F. Wong, Philip S. Honsinger
2005ICCADOptimal routing algorithms for pin clusters in high-density multichip modules.Muhammet Mustafa Ozdal, Martin D. F. Wong, Philip S. Honsinger
2005ICCADPost-placement voltage island generation under performance requirement.Huaizhi Wu, I-Min Liu, Martin D. F. Wong, Yusu Wang
2005ICCADFast algorithms for IR drop analysis in large power grid.Yu Zhong, Martin D. F. Wong
2004ASPDACOn handling arbitrary rectilinear shape constraint.Xiaoping Tang, Martin D. F. Wong
2004ASPDACTradeoff routing resource, runtime and quality in buffered routing.Xiaoping Tang, Martin D. F. Wong
2004DACOptical proximity correction (OPC): friendly maze routing.Li-Da Huang, Martin D. F. Wong
2004DATEOptimal Algorithm for Minimizing the Number of Twists in an On-Chip Bus.Liang Deng, Martin D. F. Wong
2004ICCADFloorplan design for multi-million gate FPGAs.Lei Cheng, Martin D. F. Wong
2004ICCADSimultaneous escape routing and layer assignment for dense PCBs.Muhammet Mustafa Ozdal, Martin D. F. Wong
2004ICCADA provably good algorithm for high performance bus routing.Muhammet Mustafa Ozdal, Martin D. F. Wong
2004ICCDI/O Clustering in Design Cost and Performance Optimization for Flip-Chip Design.Hung-Ming Chen, I-Min Liu, Martin D. F. Wong, Muzhou Shao, Li-Da Huang
2004ICCDA Two-Layer Bus Routing Algorithm for High-Speed Boards.Muhammet Mustafa Ozdal, Martin D. F. Wong
2004ICCDReticle Floorplanning with Guaranteed Yield for Multi-Project Wafers.Martin D. F. Wong
2004ICLPRectilinear Steiner Tree Construction Using Answer Set Programming.Esra Erdem, Martin D. F. Wong
2003ICCADStable Multiway Circuit Partitioning for ECO.Yongseok Cheon, Seokjin Lee, Martin D. F. Wong
2003ICCADA Min-Cost Flow Based Detailed Router for FPGAs.Seokjin Lee, Yongseok Cheon, Martin D. F. Wong
2003ICCADLength-Matching Routing for High-Speed Printed Circuit Boards.Muhammet Mustafa Ozdal, Martin D. F. Wong
2003ICCADBus-Driven Floorplanning.Hua Xiang, Xiaoping Tang, Martin D. F. Wong
1988ICCADChannel routing order for building-block layout with rectilinear modules.Mohankumar Guruswamy, Martin D. F. Wong
1988ICCADTopological channel routing.Shinichiro Haruyama, Martin D. F. Wong, Donald S. Fussell