Maurizio Zamboni
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
17
Venues
12
Active years
1987–2025
Best venue rank
A*
Where they publish
Papers
17 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCAS | Mage: a Decoupled Access-Execute CGRA tailored for Static Control Applications. | Alessio Naclerio, Fabrizio Riente, Giovanna Turvani, Marco Vacca, Maurizio Zamboni, Mariagrazia Graziano |
| 2024 | QCE | Towards Quantum Circuit Emulation on Low-Tier FPGAs. | Christian Conti, Deborah Volpe, Giovanni Amedeo Cirillo, Mariagrazia Graziano, Maurizio Zamboni, Giovanna Turvani |
| 2015 | ISCAS | Logic-in-Memory architecture made real. | D. Pala, Giovanni Causapruno, Marco Vacca, Fabrizio Riente, Giovanna Turvani, Mariagrazia Graziano, Maurizio Zamboni |
| 2014 | VTS | Fault tolerant nanoarray circuits: Automatic design and verification. | Pasquale Ranone, Giovanna Turvani, Fabrizio Riente, Mariagrazia Graziano, Massimo Ruo Roch, Maurizio Zamboni |
| 2010 | DATE | MEDEA: a hybrid shared-memory/message-passing multiprocessor NoC-based architecture. | Sergio Tota, Mario R. Casu, Massimo Ruo Roch, Luca Rostagno, Maurizio Zamboni |
| 2010 | ICCD | A flexible simulation methodology and tool for nanoarray-based architectures. | Stefano Frache, Mariagrazia Graziano, Maurizio Zamboni |
| 2007 | DATE | An effective AMS top-down methodology applied to the design of a mixed-signal UWB system-on-chip. | Marco Crepaldi, Mario R. Casu, Mariagrazia Graziano, Maurizio Zamboni |
| 2003 | FPGA | Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. | Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni |
| 2002 | FPL | Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. | Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni |
| 2002 | ICASSP | Reconfigurable DSP IP for multimedia applications. | Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni |
| 2001 | ISLPED | Synthesis of low-leakage PD-SOI circuits with body-biasing. | Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni |
| 2001 | VLSID | Switching Noise Analysis Framework For High Speed Logic Families. | Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni |
| 2000 | DATE | A 50 Mbit/s Iterative Turbo-Decoder. | Fabrizio Viglione, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |
| 2000 | ISCAS | A high accuracy-low complexity model for CMOS delays. | Mario Roberto Casu, Guido Masera, Gianluca Piccinini, Massimo Ruo Roch, Maurizio Zamboni |
| 1998 | ICCAD | Fanout optimization under a submicron transistor-level delay model. | Pasquale Cocchini, Massoud Pedram, Gianluca Piccinini, Maurizio Zamboni |
| 1995 | DATE | Input and output processor for an ATM high speed switch (2.5 Gb/s): the CMC. | Pierre Plaza, Juan Carlos Diaz, Fermn Calvo, Luis A. Merayo, Maurizio Zamboni, Pietro Scarfone, Marco Barbini |
| 1987 | ISCA | An Experimental VLSI Prolog Interpreter: Preliminary Measurements and Results. | Pierluigi Civera, Franco Maddaleno, Gianluca Piccinini, Maurizio Zamboni |