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Michael S. Hsiao

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

114

Venues

13

Active years

1995–2022

Best venue rank

A*

Where they publish

Papers

114 indexed papers, newest first.

YearVenueTitleAuthors
2022FDLAutomated Suggestions Framework for Processing Hardware Specifications Written in English.Rahul Krishnamurthy, Michael S. Hsiao
2021ICAARTFormal Validation for Natural Language Programming using Hierarchical Finite State Automata.Yue Zhan, Michael S. Hsiao
2020ICCDTransforming Natural Language Specifications to Logical Forms for Hardware Verification.Rahul Krishnamurthy, Michael S. Hsiao
2020ITCAutomated Assertion Generation from Natural Language Specifications.Steven J. Frederiksen, John Aromando, Michael S. Hsiao
2018ICCDOptimization of Mutant Space for RTL Test Generation.Kunal Bansal, Michael S. Hsiao
2018VTSFast fault coverage estimation of sequential tests using entropy measurements.Michael S. Hsiao, Sarmad Tanwir
2017ICCDFast Search-Based RTL Test Generation Using Control-Flow Path Guidance.Sonal Pinto, Michael S. Hsiao
2017ITCRTL functional test generation using factored concolic execution.Sonal Pinto, Michael S. Hsiao
2017VTSA framework for fast test generation at the RTL.Kelson Gent, Akash Agrawal, Michael S. Hsiao
2016DATEDynamic partitioning strategy to enhance symbolic execution.Brendan A. Marcellino, Michael S. Hsiao
2015ETSBranch guided functional test generation at the RTL.Vineeth V. Acharya, Sharad Bagri, Michael S. Hsiao
2015ICCDSI-SMART: Functional test generation for RTL circuits using loop abstraction and learning recurrence relationships.Prateek Puri, Michael S. Hsiao
2015ITCInformation-theoretic and statistical methods of failure log selection for improved diagnosis.Sarmad Tanwir, Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan
2015VTSAbstraction-based relation mining for functional test generation.Kelson Gent, Michael S. Hsiao
2014DACTACUE: A Timing-Aware Cuts Enumeration Algorithm for Parallel Synthesis.Mahmoud Elbayoumi, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Michael S. Hsiao, Mustafa Y. ElNainay
2014ETSGPU-based timing-aware test generation for small delay defects.Kuan-Yu Liao, Po-Juei Chen, Ang-Feng Lin, James Chien-Mo Li, Michael S. Hsiao, Laung-Terng Wang
2014ETSProperty-checking based LBIST for improved diagnosability.Sarvesh Prabhu, Vineeth V. Acharya, Sharad Bagri, Michael S. Hsiao
2014ITCA diagnosis-friendly LBIST architecture with property checking.Sarvesh Prabhu, Vineeth V. Acharya, Sharad Bagri, Michael S. Hsiao
2013DATELFSR seed computation and reduction using SMT-based fault-chaining.Dhrumeel Bakshi, Michael S. Hsiao
2013DATEA novel concurrent cache-friendly binary decision diagram construction for multi-core platforms.Mahmoud Elbayoumi, Michael S. Hsiao, Mustafa Y. ElNainay
2013ETSTest generation for circuits with embedded memories using SMT.Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
2013ICCDSelecting critical implications with set-covering formulation for SAT-based Bounded Model Checking.Mahmoud Elbayoumi, Michael S. Hsiao, Mustafa Y. ElNainay
2012DATEA scan pattern debugger for partial scan industrial designs.Kameshwar Chandrasekar, Supratik K. Misra, Sanjay Sengupta, Michael S. Hsiao
2012DATERAG: An efficient reliability analysis of logic circuits on graphics processing units.Min Li, Michael S. Hsiao
2012ITCDesign validation of RTL circuits using evolutionary swarm intelligence.Min Li, Kelson Gent, Michael S. Hsiao
2012VLSIDA Novel SMT-Based Technique for LFSR Reseeding.Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
2012VTSA SMT-based diagnostic test generation method for combinational circuits.Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan, Vijay Gangaram
2011DATEDesign-for-test methodology for non-scan at-speed testing.Mainak Banga, Nikhil P. Rahagude, Michael S. Hsiao
2011ETSHigh-Performance Diagnostic Fault Simulation on GPUs.Min Li, Michael S. Hsiao
2011VLSIDA Novel Learning Framework for State Space Exploration Based on Search State Extensibility Relation.Maheshwar Chandrasekar, Michael S. Hsiao
2011VLSIDFault Collapsing Using a Novel Extensibility Relation.Maheshwar Chandrasekar, Michael S. Hsiao
2011VLSIDTrace Buffer-Based Silicon Debug with Lossless Compression.Sandesh Prabhakar, Rajamani Sethuram, Michael S. Hsiao
2010DATEReversible logic synthesis through ant colony optimization.Min Li, Yexin Zheng, Michael S. Hsiao, Chao Huang
2009DATEAn efficient path-oriented bitvector encoding width computation algorithm for bit-precise verification.Nannan He, Michael S. Hsiao
2009ITCFast circuit topology based method to configure the scan chains in Illinois Scan architecture.Swapneel Donglikar, Mainak Banga, Maheshwar Chandrasekar, Michael S. Hsiao
2009ITCAn ant colony optimization technique for abstraction-guided state justification.Min Li, Michael S. Hsiao
2009VLSIDA Novel Sustained Vector Technique for the Detection of Hardware Trojans.Mainak Banga, Michael S. Hsiao
2008DATESimulation-Directed Invariant Mining for Software Verification.Xueqi Cheng, Michael S. Hsiao
2008DATEA Fast Approximation Algorithm for MIN-ONE SAT.Lei Fang, Michael S. Hsiao
2008DATEEfficient Design Validation Based on Cultural Algorithms.Weixin Wu, Michael S. Hsiao
2008ICCDAnt Colony Optimization directed program abstraction for software bounded model checking.Xueqi Cheng, Michael S. Hsiao
2008ICCDQuantifying the energy efficiency of coordinated micro-architectural adaptation for multimedia workloads.Shrirang M. Yardi, Michael S. Hsiao
2008ITCSAT-based State Justification with Adaptive Mining of Invariants.Weixin Wu, Michael S. Hsiao
2007DATEA new hybrid solution to boost SAT solver performance.Lei Fang, Michael S. Hsiao
2007ICCDBounded model checking of embedded software in wireless cognitive radio systems.Nannan He, Michael S. Hsiao
2007ITCEfficient power droop aware delay fault testing.Bin Li, Lei Fang, Michael S. Hsiao
2007ITCMining-guided state justification with partitioned navigation tracks.Ankur Parikh, Weixin Wu, Michael S. Hsiao
2007VLSIDExplicit Safety Property Strengthening in SAT-based Induction.Vishnu C. Vimjam, Michael S. Hsiao
2007VTSUsing Scan-Dump Values to Improve Functional-Diagnosis Methodology.Vishnu C. Vimjam, M. Enamul Amyeen, Ruifeng Guo, Srikanth Venkataraman, Michael S. Hsiao, Kai Yang
2006DACFast illegal state identification for improving SAT-based induction.Vishnu C. Vimjam, Michael S. Hsiao
2006DACMining global constraints for improving bounded sequential equivalence checking.Weixin Wu, Michael S. Hsiao
2006ICCDImplicit Search-Space Aware Cofactor Expansion: A Novel Preimage Computation Technique.Kameshwar Chandrasekar, Michael S. Hsiao
2006ITCCharacteristic States and Cooperative Game Based Search for Efficient Sequential ATPG and Design Validation.Xiaoding Chen, Michael S. Hsiao
2006ITCA Study of Implication Based Pseudo Functional Testing.Manan Syal, Kameshwar Chandrasekar, Vishnu C. Vimjam, Michael S. Hsiao, Yi-Shing Chang, Sreejit Chakravarty
2006VTSEfficient Fault Collapsing via Generalized Dominance Relations.Vishnu C. Vimjam, Michael S. Hsiao
2005DACDynamic abstraction using SAT-based BMC.Liang Zhang, Mukul R. Prasad, Michael S. Hsiao, Thomas Sidle
2005DATEIntegration of Learning Techniques into Incremental Satisfiability for Efficient Path-Delay Fault Test Generation.Kameshwar Chandrasekar, Michael S. Hsiao
2005DATEQuality-Driven Proactive Computation Elimination for Power-Aware Multimedia Processing.Shrirang M. Yardi, Michael S. Hsiao, Thomas L. Martin, Dong S. Ha
2005ICCDState Set Management for SAT-based Unbounded Model Checking.Kameshwar Chandrasekar, Michael S. Hsiao
2005ICCDExtended Forward Implications and Dual Recurrence Relations to Identify Sequentially Untestable Faults.Manan Syal, Rajat Arora, Michael S. Hsiao
2005ICCDA Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management.Shrirang M. Yardi, Karthik Channakeshava, Michael S. Hsiao, Thomas L. Martin, Dong S. Ha
2005ISLPEDRegion-level approximate computation reuse for power reduction in multimedia applications.Xueqi Cheng, Michael S. Hsiao
2005PERCOMTowards an Intrusion Detection System for Battery Exhaustion Attacks on Mobile Computing Devices.Daniel C. Nash, Thomas L. Martin, Dong S. Ha, Michael S. Hsiao
2005VLSIDQ-PREZ: QBF Evaluation Using Partition, Resolution and Elimination with ZBDDs.Kameshwar Chandrasekar, Michael S. Hsiao
2004DATEA Novel SAT All-Solutions Solver for Efficient Preimage Computation.Bin Li, Michael S. Hsiao, Shuo Sheng
2004ICCADIncremental deductive & inductive reasoning for SAT-based bounded model checking.Liang Zhang, Mukul R. Prasad, Michael S. Hsiao
2004ITCDecision Selection and Learning for an All-Solutions ATPG Engine.Kameshwar Chandrasekar, Michael S. Hsiao
2004ITCALAPTF: A new Transition Faultmodel and the ATPG Algorithm.Puneet Gupta, Michael S. Hsiao
2004ITCIdentifying Untestable Transition Faults in Latch Based Designs with Multiple Clocks.Manan Syal, Michael S. Hsiao, Sreejit Chakravarty
2004ITCState Variable Extraction to Reduce Problem Complexity for ATPG and Design Validation.Qingwei Wu, Michael S. Hsiao
2004PERCOMDenial-of-Service Attacks on Battery-powered Mobile Computers.Thomas L. Martin, Michael S. Hsiao, Dong S. Ha, Jayan Krishnaswami
2004VLSIDEnhancing SAT-based Bounded Model Checking using Sequential Logic Implications.Rajat Arora, Michael S. Hsiao
2004VLSIDCan SAT be used to Improve Sequential ATPG Methods?Mukul R. Prasad, Michael S. Hsiao, Jawahar Jain
2004VLSIDUntestable Fault Identification using Recurrence Relations and Impossible Value Assignments.Manan Syal, Michael S. Hsiao
2004VTSEfficient ATPG for Design Validation Based On Partitioned State Exploration Histories.Qingwei Wu, Michael S. Hsiao
2003DATEEfficient Preimage Computation Using A Novel Success-Driven ATPG.Shuo Sheng, Michael S. Hsiao
2003DATEA Novel, Low-Cost Algorithm for Sequentially Untestable Fault Identification.Manan Syal, Michael S. Hsiao
2003ITCHigh Quality ATPG for Delay Defects.Puneet Gupta, Michael S. Hsiao
2003ITCEfficient Sequential ATPG Based on Partitioned Finite-State-Machine Traversal.Qingwei Wu, Michael S. Hsiao
2003ITCEfficient Sequential ATPG for Functional RTL Circuits.Liang Zhang, Indradeep Ghosh, Michael S. Hsiao
2003VTSEnergy-Efficient Logic BIST Based on State Correlation Analysis.Xiaoding Chen, Michael S. Hsiao
2003VTSEfficient Implication - Based Untestable Bridge Fault Identifier.Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, Sreejit Chakravarty
2002DACEffective safety property checking using simulation-based sequential ATPG.Shuo Sheng, Koichiro Takayama, Michael S. Hsiao
2002DATEMaximizing Impossibilities for Untestable Fault Identification.Michael S. Hsiao
2002ETSNovel ATPG algorithms for transition faults.Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
2002ICCADCharacteristic faults and spectral information for logic BIST.Xiaoding Chen, Michael S. Hsiao
2002ITCTechniques to Reduce Data Volume and Application Time for Transition Test.Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran
2002LCNReducing Power Consumption by Utilizing Retransmission in Short Range Wireless Network.Yufeng Zhao, Michael S. Hsiao
2002VTSSpectrum-Based BIST in Complex SOCs.Ganapathy Kasturirangan, Michael S. Hsiao
2001DATEEfficient spectral techniques for sequential ATPG.Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwani D. Agrawal
2001ISLPEDCompiler-directed dynamic voltage/frequency scheduling for energy reduction in mircoprocessors.Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao
2001ISLPEDFast, flexible, cycle-accurate energy estimation.Phillip Stanley-Marbell, Michael S. Hsiao
2001ITCOn efficient error diagnosis of digital circuits.Nandini Sridhar, Michael S. Hsiao
2001VLSIDError Diagnosis of Sequential Circuits Using Region-Based Mode.Anand L. D'Souza, Michael S. Hsiao
2001VLSIDAccurate Power Macro-modeling Techniques for Complex RTL Circuits.Nachiketh R. Potlapally, Michael S. Hsiao, Anand Raghunathan, Ganesh Lakshminarayana, Srimat T. Chakradhar
2001VLSIDCombination of Structural and State Analysis for Partial Scan.Sameer Sharma, Michael S. Hsiao
2001VTSNovel Spectral Methods for Built-In Self-Test in a System-on-a-Chip Environment.Ashish Giani, Shuo Sheng, Michael S. Hsiao, Vishwani D. Agrawal
2000DATEMulti-Node Static Logic Implications for Redundancy Identification.Kabir Gulrajani, Michael S. Hsiao
2000VTSTesting, Verification, and Diagnosis in the Presence of Unknowns.Ankur Jain, Vamsi Boppana, Rajarshi Mukherjee, Jawahar Jain, Masahiro Fujita, Michael S. Hsiao
1999DATEPeak Power Estimation Using Genetic Spot Optimization for Large VLSI Circuits.Michael S. Hsiao
1999ITCAn integrated approach to behavioral-level design-for-testability using value-range and variable testability techniques.Sandhya Seshadri, Michael S. Hsiao
1999VTSOn the Evaluation of Arbitrary Defect Coverage of Test Sets.Ankur Jain, Michael S. Hsiao, Vamsi Boppana, Masahiro Fujita
1999VTSPartial Scan Using Multi-Hop State Reachability Analysis.Sameer Sharma, Michael S. Hsiao
1998DATEState Relaxation Based Subsequence Removal for Fast Static Compaction in Sequential Circuits.Michael S. Hsiao, Srimat T. Chakradhar
1998ICCADA fast, accurate, and non-statistical method for fault coverage estimation.Michael S. Hsiao
1998VLSIDPartial Scan Selection Based on Dynamic Reachability and Observability Information.Michael S. Hsiao, Gurjeet S. Saund, Elizabeth M. Rudnick, Janak H. Patel
1997DATESequential circuit test generation using dynamic state traversal.Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
1997ICCADEffects of delay models on peak power estimation of VLSI sequential circuits.Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
1997ISLPEDK2: an estimator for peak sustainable power of VLSI circuits.Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
1997VLSIDParallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation.Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee
1997VTSFast Algorithms for Static Compaction of Sequential Circuit Test Vectors.Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
1996DATEAlternating Strategies for Sequential Circuit ATPG.Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
1996VTSAutomatic test generation using genetically-engineered distinguishing sequences.Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
1995ICCDA new architectural-level fault simulation using propagation prediction of grouped fault-effects.Michael S. Hsiao, Janak H. Patel