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Michel Robert

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

20

Venues

13

Active years

1994–2016

Best venue rank

A*

Where they publish

Papers

20 indexed papers, newest first.

YearVenueTitleAuthors
2016VTCData Channel Design and Performance for LTE Narrowband IoT.Rapeepat Ratasuk, Nitin Mangalvedhe, Jorma Kaikkonen, Michel Robert
2013DACSimultaneous multithreading support in embedded distributed memory MPSoCs.Rafael Garibotti, Luciano Ost, Rmi Busseuil, Mamady kourouma, Chris Adeniyi-Jones, Gilles Sassatelli, Michel Robert
2012FCCMRemote Execution in Distributed Memory MPSoC.Rmi Busseuil, Luciano Ost, Rafael Garibotti, Gilles Sassatelli, Michel Robert
2010DATEDifferential Power Analysis enhancement with statistical preprocessing.Victor Lomn, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
2009CECJubiTool: Unified design flow for the Perplexus SIMD hardware accelerator.Olivier Brousse, Jrmie Guillot, Thierry Gil, Franois Grize, Gilles Sassatelli, Juan Manuel Moreno, Jordi Madrenas, Alessandro E. P. Villa, Henri Volken, Michel Robert
2009DATEEvaluation on FPGA of triple rail logic robustness against DPA and DEMA.Victor Lomn, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
2008FPLBio-inspiration helps computers: A new machine.Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
2007FCCMRun-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs.Gilles Sassatelli, Nicolas Saint-Jean, Pascal Benoit, Lionel Torres, Michel Robert, Cristiane R. Woszezenki, Ismael Grehs, Fernando Gehm Moraes
2006FPLA Leak Resistant Architecture Against Side Channel Attacks.Daniel Mesquita, Benot Badrignans, Lionel Torres, Gilles Sassatelli, Michel Robert, Jean-Claude Bajard, Fernando Gehm Moraes
2005ACIVSAn Image Sensor with Global Motion Estimation for Micro Camera Module.F. Gensolen, Guy Cathbras, Lionel Martin, Michel Robert
2005FPGADynamic hardware multiplexing for coarse grain reconfigurable architectures.Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon
2005FPLRun-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors.Pascal Benoit, Jrgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon
2004ICCADA flexibility aware budgeting for hierarchical flow timing closure.Olivier Omedes, Michel Robert, Mohammed Ramdani
2003FPLA Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring.Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny
2001ETFAAn embedded core for the 2D wavelet transform.Camille Diou, Lionel Torres, Michel Robert
2000ICIPA Wavelet Core for Video Processing.Camille Diou, Lionel Torres, Michel Robert
1999ITCIncreasing test coverage in a VLSI design course.Michel Robert
1999RSPFast Prototyping: A Case Study - The JPEG Compression Algorithm.Sbastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1996FPLConcurrent Design of Hardware/Software Dedicated Systems.Sbastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
1994FPLInfluence of Locig Block Layout Architecture on FPGA Performance.Michel Robert, Lionel Torres, Fernando Moraes, Daniel Auvergne