| 2025 | ASPDAC | Hardware Trojan Detection by Fine-grained Power Domain Partitioning. | Takahiro Ishikawa, Kose Yokooji, Yoshihiro Midoh, Noriyuki Miura, Michihiro Shintani, Jun Shiomi |
| 2025 | ASPDAC | Cryo-Compact Modeling Based on Sparse Gaussian Process. | Tetsuro Iwasaki, Takashi Sato, Michihiro Shintani |
| 2025 | ASPDAC | Physics-based Modeling to Extend a MOSFET Compact Model for Cryogenic Operation. | Dondee Navarro, Shin Taniguchi, Chika Tanaka, Kazutoshi Kobayashi, Takashi Sato, Michihiro Shintani |
| 2025 | ASPDAC | Cryo-HT: Hardware Trojan Activated at Cryogenic Temperatures. | Ayano Takaya, Ryuichi Nakajima, Jun Shiomi, Michihiro Shintani |
| 2024 | DATE | EcoFlex-HDP: High-Speed and Low-Power and Programmable Hyperdimensional-Computing Platform with CPU Co-Processing. | Yuya Isaka, Nau Sakaguchi, Michiko Inoue, Michihiro Shintani |
| 2024 | DATE | Accelerating Machine Learning-Based Memristor Compact Modeling Using Sparse Gaussian Process. | Yuta Shintani, Michiko Inoue, Michihiro Shintani |
| 2024 | QCE | Square-Wave Defined Pulse Generator for High Fidelity Gate Operation of Superconducting Qubits. | Ryosuke Matsuo, Kazuhisa Ogawa, Hidehisa Shiorni, Makoto Negoro, Ryutaro Ohira, Takefumi Miyoshi, Michihiro Shintani, Hiromitsu Awano, Takashi Sato, Jun Shiomi |
| 2023 | ASPDAC | Wafer-Level Characteristic Variation Modeling Considering Systematic Discontinuous Effects. | Takuma Nagao, Tomoki Nakamura, Masuo Kajiyama, Makoto Eiki, Michiko Inoue, Michihiro Shintani |
| 2023 | ITC | Improving Efficiency and Robustness of Gaussian Process Based Outlier Detection via Ensemble Learning. | Makoto Eiki, Tomoki Nakamura, Masuo Kajiyama, Michiko Inoue, Takashi Sato, Michihiro Shintani |
| 2022 | ITC | Accurate Failure Rate Prediction Based on Gaussian Process Using WAT Data. | Makoto Eiki, Tomoki Nakamura, Masuo Kajiyama, Michiko Inoue, Michihiro Shintani |
| 2021 | IOLTS | Unsupervised Recycled FPGA Detection Based on Direct Density Ratio Estimation. | Yuya Isaka, Foisal Ahmed, Michihiro Shintani, Michiko Inoue |
| 2021 | ITC | Study on High-Accuracy and Low-Cost Recycled FPGA Detection. | Foisal Ahmed, Michihiro Shintani, Michiko Inoue |
| 2021 | ITC | Wafer-level Variation Modeling for Multi-site RF IC Testing via Hierarchical Gaussian Process. | Michihiro Shintani, Riaz-ul-haque Mian, Michiko Inoue, Tomoki Nakamura, Masuo Kajiyama, Makoto Eiki |
| 2019 | ETS | Feature Engineering for Recycled FPGA Detection Based on WID Variation Modeling. | Foisal Ahmed, Michihiro Shintani, Michiko Inoue |
| 2018 | ASPDAC | Efficient worst-case timing analysis of critical-path delay under workload-dependent aging degradation. | Shumpei Morita, Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato |
| 2018 | ITC | Variation-Aware Hardware Trojan Detection through Power Side-channel. | Fakir Sharif Hossain, Michihiro Shintani, Michiko Inoue, Alex Orailoglu |
| 2018 | ITC | Artificial Neural Network Based Test Escape Screening Using Generative Model. | Michihiro Shintani, Michiko Inoue, Yoshiyuki Nakamura |
| 2017 | ASPDAC | Pattern based runtime voltage emergency prediction: An instruction-aware block sparse compressed sensing approach. | Yu-Guang Chen, Michihiro Shintani, Takashi Sato, Yiyu Shi, Shih-Chieh Chang |
| 2017 | DAC | LSTA: Learning-Based Static Timing Analysis for High-Dimensional Correlated On-Chip Variations. | Song Bian, Michihiro Shintani, Masayuki Hiromoto, Takashi Sato |
| 2014 | ICCAD | Sensorless estimation of global device-parameters based on F | Michihiro Shintani, Takashi Sato |
| 2013 | ASPDAC | An adaptive current-threshold determination for IDDQ testing based on Bayesian process parameter estimation. | Michihiro Shintani, Takashi Sato |
| 2012 | VTS | A Bayesian-based process parameter estimation using IDDQ current signature. | Michihiro Shintani, Takashi Sato |
| 2010 | ISCAS | Scan based process parameter estimation through path-delay inequalities. | Takumi Uezono, Tomoyuki Takahashi, Michihiro Shintani, Kazumi Hatayama, Kazuya Masu, Hiroyuki Ochi, Takashi Sato |
| 2010 | VTS | Path clustering for adaptive test. | Takumi Uezono, Tomoyuki Takahashi, Michihiro Shintani, Kazumi Hatayama, Kazuya Masu, Hiroyuki Ochi, Takashi Sato |
| 2009 | VTS | Small Delay Fault Model for Intra-Gate Resistive Open Defects. | Masayuki Arai, Akifumi Suto, Kazuhiko Iwasaki, Katsuyuki Nakano, Michihiro Shintani, Kazumi Hatayama, Takashi Aikyo |
| 2005 | ASPDAC | A Huffman-based coding with efficient test application. | Michihiro Shintani, Toshihiro Ohara, Hideyuki Ichihara, Tomoo Inoue |