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Navakanta Bhat

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

14

Venues

3

Active years

2002–2017

Best venue rank

National

Where they publish

Papers

14 indexed papers, newest first.

YearVenueTitleAuthors
2017VLSIDESD Behavior of AlGaN/GaN HEMT on Si: Physical Insights, Design Aspects, Cumulative Degradation and Failure Analysis.Bhawani Shankar, Ankit Soni, Manikant Singh, Rohith Soman, K. N. Bhat, Srinivasan Raghavan, Navakanta Bhat, Mayank Shrivastava
2014VLSIDImproved Design Methodology for the Development of Electrically Actuated MEMS Structures.A. V. S. S. Prasad, K. P. Venkatesh, Rudra Pratap, Navakanta Bhat
2012VLSIDCMOS Gas Sensor Array Platform with Fourier Transform Based Impedance Spectroscopy.Pramod Murali, Navakanta Bhat, Gaurab Banerjee, Bharadwaj Amrutur, K. N. Bhat, Praveen C. Ramamurthy
2011VLSIDPower Scalable Digital Baseband Architecture for IEEE 802.15.4.Satyam Dwivedi, Bharadwaj Amrutur, Navakanta Bhat
2009ISCASBridging Technology-CAD and Design-CAD for Variability Aware Nano-CMOS Circuits.B. P. Harish, Navakanta Bhat, Mahesh B. Patil
2008ISCASA low power, process invariant keeper for high speed dynamic logic circuits.Rakesh Gnana David Jeyasingh, Navakanta Bhat
2008ISLPEDOptimal power and noise allocation for analog and digital sections of a low power radio receiver.Kannan Aryaperumal Sankaragomathi, Manodipan Sahoo, Satyam Dwivedi, Bharadwaj S. Amrutur, Navakanta Bhat
2008VLSIDGyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes.Sukumar Jairam, Navakanta Bhat
2007ISCASHigh Precision 16-bit Readout Gas Sensor Interface in 0.13m CMOS.Balaji Jayaraman, Navakanta Bhat
2005VLSIDImpact of Channel Engineering on Unity Gain Frequency and Noise-Figure in 90nm NMOS Transistor for RF Applications.R. Srinivasan, Navakanta Bhat
2004VLSIDA Quasi Static Model for a Simply Supported Beam in a Circuit Simulation Framework.Sukumar Jairam, C. Venkatesh, Navakanta Bhat, Shyam Singh, Rudra Pratap
2004VLSIDResponse Surface Modeling of 100nm CMOS Process Technology using Design of Experiment.H. C. Srinivasaiah, Navakanta Bhat
2003VLSIDEffect of Scaling on the Non-quasi-static Behaviour of the MOSFET for RF IC's.R. Srinivasan, Navakanta Bhat
2002VLSIDImplant Dose Sensitivity of 0.1m CMOS Inverter Delay.H. C. Srinivasaiah, Navakanta Bhat