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Nick Brown

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

40

Venues

13

Active years

2015–2026

Best venue rank

A*

Where they publish

Papers

40 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPLOSAn MLIR Lowering Pipeline for Stencils at Wafer-Scale.Nicolai Stawinoga, David Katz, Anton Lydike, Justs Zarins, Nick Brown, George Bisbas, Tobias Grosser
2026CCGRIDLifting to Tensors when Compiling Scientific Computing Workloads for AI Engines.Nick Brown, Gabriel Rodriguez-Canal
2026FCCMTowards Compiler-Driven Dynamic Partial Reconfiguration with MLIR.Gabriel Rodriguez-Canal, Nick Brown, Maurice Jamieson, Nicolas Bohm Agostini, Ankur Limaye, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo
2026FPGATowards Scheduling of Pipelined Dataflow Graphs in MLIR.Gabriel Rodriguez-Canal, Nicolas Bohm Agostini, Ankur Limaye, Vito Giovanni Castellana, Joseph B. Manzano, Antonino Tumeo, Maurice Jamieson, Nick Brown
2025CSEDUAI Principles in Practice with a Learning Engineering Framework.Rachel Van Campenhout, Nick Brown, Benny G. Johnson
2025FPGASeamless Acceleration of Fortran Intrinsics via AMD AI Engines.Nick Brown, Gabriel Rodriguez-Canal
2025SCIs RISC-V ready for High Performance Computing? An evaluation of the Sophon SG2044.Nick Brown
2025SCProgrammer productivity and performance on AMD's AI Engines: Offloading Fortran intrinsics via MLIR a case-study.Nick Brown, Gabriel Rodriguez-Canal
2025SCAn MLIR pipeline for offloading Fortran to FPGAs via OpenMP.Gabriel Rodriguez-Canal, David Katz, Nick Brown
2024ASPLOSA shared compilation stack for distributed-memory parallelism in stencil DSLs.George Bisbas, Anton Lydike, Emilien Bauer, Nick Brown, Mathieu Fehr, Lawrence Mitchell, Gabriel Rodriguez-Canal, Maurice Jamieson, Paul H. J. Kelly, Michel Steuwer, Tobias Grosser
2024FPGAEvaluating Versal AI Engines for Option Price Discovery in Market Risk Analysis.Mark Klaisoongnoen, Nick Brown, Tim Dykes, Jessica R. Jones, Utz-Uwe Haus
2024SCFully integrating the Flang Fortran compiler with standard MLIR.Nick Brown
2024SCAccelerating stencils on the Tenstorrent Grayskull RISC-V accelerator.Nick Brown, Ryan Barton
2024SCPragma driven shared memory parallelism in Zig by supporting OpenMP loop directives.David Kacs, Joseph Lee, Justs Zarins, Nick Brown
2023FPGAExploring the Versal AI Engines for Accelerating Stencil-based Atmospheric Advection Simulation.Nick Brown
2023FPLFortran High-Level Synthesis: Reducing the Barriers to Accelerating HPC Codes on FPGAs.Gabriel Rodriguez-Canal, Nick Brown, Tim Dykes, Jessica R. Jones, Utz-Uwe Haus
2023SCFortran performance optimisation and auto-parallelisation by leveraging MLIR-based domain specific abstractions in Flang.Nick Brown, Maurice Jamieson, Anton Lydike, Emilien Bauer, Tobias Grosser
2023SCIs RISC-V ready for HPC prime-time: Evaluating the 64-core Sophon SG2042 RISC-V CPU.Nick Brown, Maurice Jamieson, Joseph K. L. Lee, Paul Wang
2023SCStencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA.Gabriel Rodriguez-Canal, Nick Brown, Maurice Jamieson, Emilien Bauer, Anton Lydike, Tobias Grosser
2023SOFTCOMExploring Student Persistence with Automatically Generated Practice through Interaction Patterns.Rachel Van Campenhout, Michelle W. Clark, Jeffrey S. Dittel, Nick Brown, Richard Benton, Benny G. Johnson
2022EuroParExploring the Suitability of the Cerebras Wafer Scale Engine for Stencil-Based Computation Codes.Nick Brown, Brandon Echols, Justs Zarins, Tobias Grosser
2022EuroParPerformance of the Vipera Framework for DSLs on Micro-Core Architectures.Maurice Jamieson, Nick Brown
2022EuroParProgramming Abstractions for Preemptive Scheduling on FPGAs Using Partial Reconfiguration.Gabriel Rodriguez-Canal, Nick Brown, Yuri Torres, Arturo Gonzlez-Escribano
2022FCCMA programming model for developing Application Specific Dataflow Machines on FPGAs.Nick Brown
2021CCCompact native code generation for dynamic languages on micro-core architectures.Maurice Jamieson, Nick Brown
2021CLUSTERAccelerating advection for atmospheric modelling on Xilinx and Intel FPGAs.Nick Brown
2021CLUSTEROptimisation of an FPGA Credit Default Swap engine by embracing dataflow techniques.Nick Brown, Mark Klaisoongnoen, Oliver Thomson Brown
2021SCUtilising urgent computing to tackle the spread of mosquito-borne diseases.Nick Brown, Rupert Nash, Piero Poletti, Giorgio Guzzetta, Mattia Manica, Agnese Zardini, Markus Flatken, Jules Vidal, Charles Gueunet, Evgenij Belikov, Julien Tierny, Artur Podobas, Wei Der Chien, Stefano Markidis, Andreas Gerndt
2020CLUSTERInvestigating Applications on the A64FX.Adrian Jackson, Michle Weiland, Nick Brown, Andrew Turner, Mark Parsons
2020ECAIMachine Learning for Gas and Oil Exploration.Vito Alexander Nordloh, Anna Roubckov, Nick Brown
2020FPLWeighing Up the New Kid on the Block: Impressions of using Vitis for HPC Software Development.Nick Brown
2020ICWSMWhen Does Trust in Online Social Groups Grow?Shankar Iyer, Justin Cheng, Nick Brown, Xiuhua Wang
2020SCExploring the acceleration of Nekbone on reconfigurable architectures.Nick Brown
2020SCA Bespoke Workflow Management System for Data-Driven Urgent HPC.Gordon P. S. Gibb, Nick Brown, Rupert W. Nash, Miguel Mendes, Santiago Monedero, Humberto Daz Fidalgo, Joaqun Ramrez Cisneros, Adrin Cardil, Max Kontak
2020SCBenchmarking micro-core architectures for detecting disasters at the edge.Maurice Jamieson, Nick Brown
2019SCIt's All About Data Movement: Optimising FPGA Data Access to Boost Performance.Nick Brown, David Dolman
2019SCiPregel: Strategies to Deal with an Extreme Form of Irregularity in Vertex-Centric Graph Processing.Ludovic Anthony Richard Capelli, Nick Brown, Jonathan Mark Bull
2019SCThe Technologies Required for Fusing HPC and Real-Time Data to Support Urgent Computing.Gordon Gibb, Rupert Nash, Nick Brown, Bianca Prodan
2016SCePython: An Implementation of Python for the Many-Core Epiphany Co-processor.Nick Brown
2015SCA directive based hybrid met office NERC cloud model.Nick Brown, Angus Lepper, Michle Weiland, Adrian Hill, Ben Shipway, Chris M. Maynard