Norman P. Jouppi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
81
Venues
20
Active years
1982–2023
Best venue rank
A*
Where they publish
- A*ISCA24 papers
- A*MICRO11 papers
- ASC8 papers
- A*HPCA7 papers
- A*ASPLOS4 papers
- AICCAD4 papers
- ADATE3 papers
- AISLPED3 papers
- A*DAC2 papers
- BISPASS2 papers
- NationalHOTI2 papers
- A*ICRA2 papers
- ACSCW2 papers
- A*CVPR1 paper
- AICS1 paper
- Journal PublishedCASES1 paper
- BPPoPP1 paper
- NationalHiPC1 paper
- A*SIGGRAPH1 paper
- CICCD1 paper
Papers
81 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | ASPLOS | Hyperscale Hardware Optimized Neural Architecture Search. | Sheng Li, Garrett Andersen, Tao Chen, Liqun Cheng, Julian Grady, Da Huang, Quoc V. Le, Andrew Li, Xin Li, Yang Li, Chen Liang, Yifeng Lu, Yun Ni, Ruoming Pang, Mingxing Tan, Martin Wicke, Gang Wu, Shengqi Zhu, Parthasarathy Ranganathan, Norman P. Jouppi |
| 2023 | ISCA | TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings. | Norman P. Jouppi, George Kurian, Sheng Li, Peter C. Ma, Rahul Nagarajan, Lifeng Nai, Nishant Patil, Suvinay Subramanian, Andy Swing, Brian Towles, Cliff Young, Xiang Zhou, Zongwei Zhou, David A. Patterson |
| 2021 | CVPR | Searching for Fast Model Families on Datacenter Accelerators. | Sheng Li, Mingxing Tan, Ruoming Pang, Andrew Li, Liqun Cheng, Quoc V. Le, Norman P. Jouppi |
| 2021 | HPCA | NeuroMeter: An Integrated Power, Area, and Timing Modeling Framework for Machine Learning Accelerators Industry Track Paper. | Tianqi Tang, Sheng Li, Lifeng Nai, Norman P. Jouppi, Yuan Xie |
| 2021 | ISCA | Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial Product. | Norman P. Jouppi, Doe Hyun Yoon, Matthew Ashcraft, Mark Gottscho, Thomas B. Jablin, George Kurian, James Laudon, Sheng Li, Peter C. Ma, Xiaoyu Ma, Thomas Norrie, Nishant Patil, Sushma Prasad, Cliff Young, Zongwei Zhou, David A. Patterson |
| 2017 | ISCA | In-Datacenter Performance Analysis of a Tensor Processing Unit. | Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Daniel Killebrew, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Matt Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon |
| 2015 | ICS | History-Assisted Adaptive-Granularity Caches (HAAG$) for High Performance 3D DRAM Architectures. | Ke Chen, Sheng Li, Jung Ho Ahn, Naveen Muralimanohar, Jishen Zhao, Cong Xu, Seongil O, Yuan Xie, Jay B. Brockman, Norman P. Jouppi |
| 2013 | DAC | Understanding the trade-offs in multi-level cell ReRAM memory design. | Cong Xu, Dimin Niu, Naveen Muralimanohar, Norman P. Jouppi, Yuan Xie |
| 2013 | HPCA | i | Jue Wang, Xiangyu Dong, Yuan Xie, Norman P. Jouppi |
| 2013 | ICCAD | Design of cross-point metal-oxide ReRAM emphasizing reliability and cost. | Dimin Niu, Cong Xu, Naveen Muralimanohar, Norman P. Jouppi, Yuan Xie |
| 2013 | ISPASS | McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling. | Jung Ho Ahn, Sheng Li, Seongil O, Norman P. Jouppi |
| 2013 | ISPASS | A circuit-architecture co-optimization framework for evaluating emerging memory hierarchies. | Xiangyu Dong, Norman P. Jouppi, Yuan Xie |
| 2013 | MICRO | Kiln: closing the performance gap between systems with and without persistence support. | Jishen Zhao, Sheng Li, Doe Hyun Yoon, Yuan Xie, Norman P. Jouppi |
| 2013 | SC | Practical nonvolatile multilevel-cell phase change memory. | Doe Hyun Yoon, Jichuan Chang, Robert S. Schreiber, Norman P. Jouppi |
| 2012 | DATE | CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory. | Ke Chen, Sheng Li, Naveen Muralimanohar, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi |
| 2012 | HPCA | Staged Reads: Mitigating the impact of DRAM writes on DRAM reads. | Niladrish Chatterjee, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi |
| 2012 | ICCAD | CACTI-IO: CACTI with off-chip power-area-timing models. | Norman P. Jouppi, Andrew B. Kahng, Naveen Muralimanohar, Vaishnav Srinivas |
| 2012 | ISCA | LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems. | Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi |
| 2012 | ISLPED | Design trade-offs for high density cross-point resistive memory. | Dimin Niu, Cong Xu, Naveen Muralimanohar, Norman P. Jouppi, Yuan Xie |
| 2012 | SC | MAGE: adaptive granularity and ECC for resilient and power efficient memory systems. | Sheng Li, Doe Hyun Yoon, Ke Chen, Jishen Zhao, Jung Ho Ahn, Jay B. Brockman, Yuan Xie, Norman P. Jouppi |
| 2011 | DATE | Design implications of memristor-based RRAM cross-point structures. | Cong Xu, Xiangyu Dong, Norman P. Jouppi, Yuan Xie |
| 2011 | HPCA | FREE-p: Protecting non-volatile memory against both hard and soft errors. | Doe Hyun Yoon, Naveen Muralimanohar, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi, Mattan Erez |
| 2011 | ICCAD | CACTI-P: Architecture-level modeling for SRAM-based structures with advanced leakage reduction techniques. | Sheng Li, Ke Chen, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi |
| 2011 | ISCA | The role of optics in future high radix switch design. | Nathan L. Binkert, Al Davis, Norman P. Jouppi, Moray McLaren, Naveen Muralimanohar, Robert Schreiber, Jung Ho Ahn |
| 2011 | ISCA | Combining memory and a controller with photonics through 3D-stacking to enable scalable and energy-efficient systems. | Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi |
| 2011 | MICRO | System-level integrated server architectures for scale-out datacenters. | Sheng Li, Kevin T. Lim, Paolo Faraboschi, Jichuan Chang, Parthasarathy Ranganathan, Norman P. Jouppi |
| 2011 | SC | System implications of memory reliability in exascale computing. | Sheng Li, Ke Chen, Ming-yu Hsieh, Naveen Muralimanohar, Chad D. Kersey, Jay B. Brockman, Arun F. Rodrigues, Norman P. Jouppi |
| 2010 | ISCA | Rethinking DRAM design and organization for energy-constrained multi-cores. | Aniruddha N. Udipi, Naveen Muralimanohar, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi |
| 2010 | SC | Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support. | Xiangyu Dong, Yuan Xie, Naveen Muralimanohar, Norman P. Jouppi |
| 2009 | ICCAD | PCRAMsim: System-level performance, energy, and area modeling for Phase-Change RAM. | Xiangyu Dong, Norman P. Jouppi, Yuan Xie |
| 2009 | ISLPED | Emerging technologies and their impact on system design. | Norman P. Jouppi, Yuan Xie |
| 2009 | MICRO | McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. | Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi |
| 2009 | SC | Future scaling of processor-memory interfaces. | Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber |
| 2009 | SC | Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems. | Xiangyu Dong, Naveen Muralimanohar, Norman P. Jouppi, Richard Kaufmann, Yuan Xie |
| 2008 | HOTI | A Nanophotonic Interconnect for High-Performance Many-Core Computation. | Raymond G. Beausoleil, Jung Ho Ahn, Nathan L. Binkert, Al Davis, David Fattal, Marco Fiorentino, Norman P. Jouppi, Moray McLaren, Charles M. Santori, Robert S. Schreiber, S. M. Spillane, Dana Vantrease, Qianfan Xu |
| 2008 | HOTI | A High-Speed Optical Multi-Drop Bus for Computer Interconnections. | Michael R. T. Tan, Paul Rosenberg, Jong Souk Yeo, Moray McLaren, Sagi Mathai, Terry Morris, Joseph Straznicky, Norman P. Jouppi, Huei Pei Kuo, Shih-Yuan Wang, Scott Lerner, Pavel Kornilovich, Neal Meyer, Robert Bicknell, Charles Otis, Len Seals |
| 2008 | ISCA | A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies. | Shyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi |
| 2008 | ISCA | Corona: System Implications of Emerging Nanophotonic Technology. | Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn |
| 2008 | ISLPED | System implications of integrated photonics. | Norman P. Jouppi |
| 2008 | MICRO | Implementing high availability memory with a duplication cache. | Nidhi Aggarwal, James E. Smith, Kewal K. Saluja, Norman P. Jouppi, Parthasarathy Ranganathan |
| 2007 | DATE | Microprocessors in the era of terascale integration. | Shekhar Borkar, Norman P. Jouppi, Per Stenstrm |
| 2007 | ISCA | Configurable isolation: building high availability systems with commodity multi-core processors. | Nidhi Aggarwal, Parthasarathy Ranganathan, Norman P. Jouppi, James E. Smith |
| 2007 | MICRO | Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0. | Naveen Muralimanohar, Rajeev Balasubramonian, Norman P. Jouppi |
| 2007 | SC | High-performance ethernet-based communications for future multi-core processors. | Michael S. Schlansker, Nagabhushan Chitlur, Erwin Oertli, Paul M. Stillwell Jr., Linda Rankin, Dennis Bradford, Richard J. Carter, Jayaram Mudigonda, Nathan L. Binkert, Norman P. Jouppi |
| 2006 | CASES | Improving the performance and power efficiency of shared helpers in CMPs. | Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi, Timothy Sherwood, Suleyman Sair |
| 2006 | MICRO | Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers. | Jack Sampson, Rubn Gonzlez, Jean-Francois Collard, Norman P. Jouppi, Michael S. Schlansker, Brad Calder |
| 2006 | SC | Architecture - The potential energy efficiency of vector acceleration. | Christophe Lemuet, Jack Sampson, Jean-Francois Collard, Norman P. Jouppi |
| 2005 | HPCA | Enterprise IT Trends and Implications for Architecture Research. | Parthasarathy Ranganathan, Norman P. Jouppi |
| 2005 | ICRA | Telepresence Systems With Automatic Preservation of User Head Height, Local Rotation, and Remote Translation. | Norman P. Jouppi, Stan Thomas |
| 2005 | MICRO | The Future Evolution of High-Performance Microprocessors. | Norman P. Jouppi |
| 2005 | PPoPP | System-wide performance monitors and their application to the optimization of coherent memory accesses. | Jean-Francois Collard, Norman P. Jouppi, Sami Yehia |
| 2004 | HiPC | The Future Evolution of High-Performance Microprocessors. | Norman P. Jouppi |
| 2004 | ICRA | A First Generation Mutually-Immersive Mobile Telepresence Surrogate with Automatic Backtracking. | Norman P. Jouppi, Subu Iyer, Wayne Mack, April Slayden Mitchell, Stan Thomas |
| 2004 | ISCA | Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance. | Rakesh Kumar, Dean M. Tullsen, Parthasarathy Ranganathan, Norman P. Jouppi, Keith I. Farkas |
| 2004 | MICRO | Conjoined-Core Chip Multiprocessing. | Rakesh Kumar, Norman P. Jouppi, Dean M. Tullsen |
| 2003 | MICRO | Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction. | Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, Parthasarathy Ranganathan, Dean M. Tullsen |
| 2002 | CSCW | First steps towards mutually-immersive mobile telepresence. | Norman P. Jouppi |
| 2002 | CSCW | First steps towards mutually-immersive mobile telepresence. | Norman P. Jouppi, Wayne Mack, Subu Iyer, Stan Thomas, April Slayden |
| 2002 | ISCA | The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays. | M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas |
| 2000 | ISCA | Reconfigurable caches and their application to media processing. | Parthasarathy Ranganathan, Sarita V. Adve, Norman P. Jouppi |
| 1999 | ISCA | Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions. | Parthasarathy Ranganathan, Sarita V. Adve, Norman P. Jouppi |
| 1999 | SIGGRAPH | Feline: Fast Elliptical Lines for Anisotropic Texture Mapping. | Joel McCormack, Ronald N. Perry, Keith I. Farkas, Norman P. Jouppi |
| 1998 | ISCA | Retrospective: Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers. | Norman P. Jouppi |
| 1998 | ISCA | Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache Prefetch Buffers. | Norman P. Jouppi |
| 1997 | ISCA | Memory-System Design Considerations for Dynamically-Scheduled Processors. | Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic |
| 1997 | ISCA | Complexity-Effective Superscalar Processors. | Subbarao Palacharla, Norman P. Jouppi, James E. Smith |
| 1997 | MICRO | The Multicluster Architecture: Reducing Cycle Time Through Partitioning. | Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko G. Vranesic |
| 1996 | HPCA | Register File Design Considerations in Dynamically Scheduled Processors. | Keith I. Farkas, Norman P. Jouppi, Paul Chow |
| 1995 | HPCA | How Useful Are Non-Blocking Loads, Stream Buffers and Speculative Execution in Multiple Issue Processors? | Keith I. Farkas, Norman P. Jouppi, Paul Chow |
| 1994 | ISCA | Complexity/Performance Tradeoffs with Non-Blocking Loads. | Keith I. Farkas, Norman P. Jouppi |
| 1994 | ISCA | Tradeoffs in Two-Level On-Chip Caching. | Norman P. Jouppi, Steven J. E. Wilton |
| 1993 | ISCA | Cache Write Policies and Performance. | Norman P. Jouppi |
| 1992 | ISCA | A Simulation Based Study of TLB Performance. | J. Bradley Chen, Anita Borg, Norman P. Jouppi |
| 1990 | ISCA | Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers. | Norman P. Jouppi |
| 1989 | ASPLOS | A Unified Vector/Scalar Floating-Point Architecture. | Norman P. Jouppi, Jonathan Bertoni, David W. Wall |
| 1989 | ASPLOS | Available Instruction-Level Parallelism for Superscalar and Superpipelined Machines. | Norman P. Jouppi, David W. Wall |
| 1989 | ICCD | Integration and packaging plateaus of processor performance. | Norman P. Jouppi |
| 1989 | ISCA | Architectural and Organizational Tradeoffs in the Design of the MultiTitan CPU. | Norman P. Jouppi |
| 1983 | DAC | Timing analysis for nMOS VLSI. | Norman P. Jouppi |
| 1982 | ASPLOS | Hardware/Software Tradeoffs for Increased Performance. | John L. Hennessy, Norman P. Jouppi, Forest Baskett, Thomas R. Gross, John Gill |
| 1982 | MICRO | MIPS: A microprocessor architecture. | John L. Hennessy, Norman P. Jouppi, Steven A. Przybylski, Christopher Rowen, Thomas R. Gross, Forest Baskett, John Gill |