| 2025 | FPL | AffiNiTy: A Multi-Scalar Multiplication Accelerator with a Novel Batched Inversion Architecture. | Tong Wu, Niall Emmart, Oliver Diessel |
| 2022 | FCCM | On the Single Event Upset Vulnerability and Mitigation of Binarized Neural Networks on FPGAs. | Junning Fan, Oliver Diessel |
| 2022 | FCCM | Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work. | Tong Wu, Oliver Diessel |
| 2018 | FCCM | From C to Fault-Tolerant FPGA-Based Systems. | Dimitris Agiakatsikas, Ganghee Lee, Thomas Mitchell, Ediz Cetin, Oliver Diessel |
| 2017 | FCCM | TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS. | Ganghee Lee, Dimitris Agiakatsikas, Tong Wu, Ediz Cetin, Oliver Diessel |
| 2017 | FCCM | Scheduling Considerations for Voter Checking in TMR-MER Systems. | Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel |
| 2017 | FPL | Reliable SEU monitoring and recovery using a programmable configuration controller. | Lingkan Gong, Alexander Kroh, Dimitris Agiakatsikas, Nguyen T. H. Nguyen, Ediz Cetin, Oliver Diessel |
| 2016 | FCCM | Reconfiguration Control Networks for TMR Systems with Module-Based Recovery. | Dimitris Agiakatsikas, Nguyen T. H. Nguyen, Zhuoran Zhao, Tong Wu, Ediz Cetin, Oliver Diessel, Lingkan Gong |
| 2016 | FPL | FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs. | Dimitris Agiakatsikas, Ediz etin, Oliver Diessel |
| 2015 | FPL | Significant papers from the first 25 years of the FPL conference. | Philip Heng Wai Leong, Hideharu Amano, Jason Helge Anderson, Koen Bertels, Joo M. P. Cardoso, Oliver Diessel, Guy Gogniat, Mike Hutton, JunKyu Lee, Wayne Luk, Patrick Lysaght, Marco Platzner, Viktor K. Prasanna, Tero Rissa, Cristina Silvano, Hayden Kwok-Hay So, Yu Wang |
| 2015 | ISCAS | Improving Fmax of FPGA circuits employing DPR to recover from configuration memory upsets. | Ediz Cetin, Oliver Diessel, Lingkan Gong |
| 2015 | ISCAS | A programmable multi-GNSS baseband receiver. | Vinh T. Tran, Nagaraj Channarayapatna Shivaramaiah, Oliver Diessel, Andrew G. Dempster |
| 2014 | ISCAS | Reconfiguration network design for SEU recovery in FPGAs. | Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai |
| 2013 | FPL | Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration. | Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai |
| 2012 | FPGA | Functionally verifying state saving and restoration in dynamically reconfigurable systems. | Lingkan Gong, Oliver Diessel |
| 2011 | FCCM | Modeling Dynamically Reconfigurable Systems for Simulation-Based Functional Verification. | Lingkan Gong, Oliver Diessel |
| 2008 | FCCM | The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration. | Shannon Koh, Oliver Diessel |
| 2007 | FPL | Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices. | Shannon Koh, Oliver Diessel |
| 2006 | FCCM | COMMA: A Communications Methodology for Dynamic Module Reconfiguration in FPGAs. | Shannon Koh, Oliver Diessel |
| 2006 | FPL | The Entropy of FPGA Reconfiguration. | Usama Malik, Oliver Diessel |
| 2005 | FPL | A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs. | Usama Malik, Oliver Diessel |
| 2002 | EuroPar | Towards High-Level Specification, Synthesis, and Virtualization of Programmable Logic Designs (Research Note). | Oliver Diessel, Usama Malik, Keith So |
| 2001 | FPL | Chip-Based Reconfigurable Task Management. | Gordon J. Brebner, Oliver Diessel |
| 2000 | FPL | Behavioural Language Compilation with Virtual Hardware Management. | Oliver Diessel, George J. Milne |
| 1998 | FPGA | Partial FPGA Rearrangement by Local Repacking (Abstract). | Oliver Diessel, Hossam A. ElGindy |
| 1997 | FPL | Run-time compaction of FPGA designs. | Oliver Diessel, Hossam A. ElGindy |