| 2026 | FPGA | Enabling Efficient SpMM for Sparse Attention on GEMM-Optimized Hardware with Block Aggregation. | Tianchu Ji, Niranjan Balasubramanian, Michael Ferdman, Peter A. Milder |
| 2023 | NSDI | Waverunner: An Elegant Approach to Hardware Acceleration of State Machine Replication. | Mohammadreza Alimadadi, Hieu Mai, Shenghsun Cho, Michael Ferdman, Peter A. Milder, Shuai Mu |
| 2021 | ACL | On the Distribution, Sparsity, and Inference-time Quantization of Attention Values in Transformers. | Tianchu Ji, Shraddhan Jain, Michael Ferdman, Peter A. Milder, H. Andrew Schwartz, Niranjan Balasubramanian |
| 2020 | FPGA | FPGA-Accelerated Samplesort for Large Data Sets. | Han Chen, Sergey Madaminov, Michael Ferdman, Peter A. Milder |
| 2020 | ISCA | Flick: Fast and Lightweight ISA-Crossing Call for Heterogeneous-ISA Environments. | Shenghsun Cho, Han Chen, Sergey Madaminov, Michael Ferdman, Peter A. Milder |
| 2019 | FCCM | Sorting Large Data Sets with FPGA-Accelerated Samplesort. | Han Chen, Sergey Madaminov, Michael Ferdman, Peter A. Milder |
| 2019 | FPL | Runtime-Programmable Pipelines for Model Checkers on FPGAs. | Mrunal Patel, Shenghsun Cho, Michael Ferdman, Peter A. Milder |
| 2018 | FPGA | A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs. | Shenghsun Cho, Mrunal Patel, Han Chen, Michael Ferdman, Peter A. Milder |
| 2018 | FPL | FPGASwarm: High Throughput Model Checking on FPGAs. | Shenghsun Cho, Michael Ferdman, Peter A. Milder |
| 2018 | FPL | Medusa: A Scalable Interconnect for Many-Port DNN Accelerators and Wide DRAM Controller Interfaces. | Yongming Shen, Tianchu Ji, Michael Ferdman, Peter A. Milder |
| 2018 | MOBICOM | Poster: A Raspberry Pi Based Data-Centric MAC for Robust Multicast in Vehicular Network. | Mohammed Elbadry, Bing Zhou, Fan Ye, Peter A. Milder, Yuanyuan Yang |
| 2017 | FCCM | Escher: A CNN Accelerator with Flexible Buffering to Minimize Off-Chip Transfer. | Yongming Shen, Michael Ferdman, Peter A. Milder |
| 2017 | FPGA | Storage-Efficient Batching for Minimizing Bandwidth of Fully-Connected Neural Network Layers (Abstract Only). | Yongming Shen, Michael Ferdman, Peter A. Milder |
| 2017 | ICASSP | Practical Matlab experience in lecture-based signals and systems courses. | Peter A. Milder, Mnica F. Bugallo |
| 2017 | ISCA | Maximizing CNN Accelerator Efficiency Through Resource Partitioning. | Yongming Shen, Michael Ferdman, Peter A. Milder |
| 2016 | FPL | Overcoming resource underutilization in spatial CNN accelerators. | Yongming Shen, Michael Ferdman, Peter A. Milder |
| 2016 | MEMOCODE | MEMOCODE 2016 design contest: K-means clustering. | Peter A. Milder |
| 2016 | MICRO | Fused-layer CNN accelerators. | Manoj Alwani, Han Chen, Michael Ferdman, Peter A. Milder |
| 2015 | DAC | Nautilus: fast automated IP design space search using guided genetic algorithms. | Michael K. Papamichael, Peter A. Milder, James C. Hoe |
| 2015 | MEMOCODE | MEMOCODE 2015 design contest: Continuous skyline computation. | Peter A. Milder |
| 2014 | DATE | Trade-offs in execution signature compression for reliable processor systems. | Jonah Caplan, Maria Isabel Mera, Peter A. Milder, Brett H. Meyer |
| 2014 | MEMOCODE | MEMOCODE 2014 design contest: k-Nearest Neighbors with Mahalanobis distance metric. | Peter A. Milder |
| 2012 | DAC | Computer generation of streaming sorting networks. | Marcela Zuluaga, Peter A. Milder, Markus Pschel |
| 2012 | FCCM | Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes. | Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe |
| 2012 | FPGA | Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only). | Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe |
| 2012 | ICASSP | Improving fixed-point accuracy of FFT cores in O-OFDM systems. | Robert Koutsoyannis, Peter A. Milder, Christian R. Berger, Madeleine Glick, James C. Hoe, Markus Pschel |
| 2010 | ICASSP | Hardware implementation of the discrete fourier transform with non-power-of-two problem size. | Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Pschel |
| 2010 | MICRO | Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs? | Eric S. Chung, Peter A. Milder, James C. Hoe, Ken Mai |
| 2009 | DATE | Automatic generation of streaming datapaths for arbitrary fixed permutations. | Peter A. Milder, James C. Hoe, Markus Pschel |
| 2008 | DAC | Formal datapath representation and manipulation for implementing DSP transforms. | Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Pschel |
| 2007 | FCCM | Generating FPGA-Accelerated DFT Libraries. | Paolo D'Alberto, Peter A. Milder, Aliaksei Sandryhaila, Franz Franchetti, James C. Hoe, Jos M. F. Moura, Markus Pschel, Jeremy R. Johnson |
| 2006 | FPGA | Fast and accurate resource estimation of automatically generated custom DFT IP cores. | Peter A. Milder, Mohammad Ahmad, James C. Hoe, Markus Pschel |
| 2005 | DAC | Automatic generation of customized discrete fourier transform IPs. | Grace Nordin, Peter A. Milder, James C. Hoe, Markus Pschel |