Peter Harrod
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
5
Active years
1999–2018
Best venue rank
A*
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | MICRO | Error Correlation Prediction in Lockstep Processors for Safety-Critical Systems. | Emre Ozer, Balaji Venu, Xabier Iturbe, Shidhartha Das, Spyros Lyberis, John Biggs, Peter Harrod, John Penton |
| 2009 | DATE | Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing. | S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Harrod |
| 2008 | ETS | Bridge Defect Diagnosis for Multiple-Voltage Design. | S. Saqib Khursheed, Paul M. Rosinger, Bashir M. Al-Hashimi, Sudhakar M. Reddy, Peter Harrod |
| 2008 | IOLTS | A New Approach for Transient Fault Injection Using Symbolic Simulation. | Ashish Darbari, Bashir M. Al-Hashimi, Peter Harrod, Daryl Bradley |
| 2006 | ETS | Dynamic Voltage Scaling Aware Delay Fault Testing. | Noohul Basheer Zain Ali, Mark Zwolinski, Bashir M. Al-Hashimi, Peter Harrod |
| 2003 | ITC | The P1500 DFT Disclosure Document: A Standard to Communicate Mergeable Core DFT Data. | Michael G. Wahl, Sudipta Bhawmik, Kamran Zarrineh, Pradipta Ghosh, Scott Davidson, Peter Harrod |
| 2000 | ETS | Microprocessor cores. | Andrew Burdass, Gary Campbell, Richard Grisenthwaite, David Gwilt, Peter Harrod, Richard York |
| 1999 | ITC | Testing reusable IP-a case study. | Peter Harrod |