| 2011 | ICASSP | A FPGA architecture for real-time processing of variable-length FFTS. | Stefan Langemeyer, Peter Pirsch, Holger Blume |
| 2007 | DSD | RAPANUI: A case study in Rapid Prototyping for Multiprocessor System-on-Chip. | Guillermo Pay-Vay, Javier Martn-Langerwerf, Peter Pirsch |
| 2007 | WCAE | ChipDesign: from theory to real world. | Guillermo Pay-Vay, Thomas Jambor, Konstantin Septinus, Sebastian Hesselbarth, Holger Flatt, Marc Freisfeld, Peter Pirsch |
| 2006 | MMSP | A Highly Parallel Sub-Pel Accurate Motion Estimator for H.264. | Sebastian Flgel, Heiko Klumann, Peter Pirsch, Marco Schulz, Malik Cisse, Winfried Gehrke |
| 2005 | GI | Von abstrakten Architekturtemplates zur hardwarenahen Architekturexploration. | Matthias Winter, Peter Pirsch |
| 2005 | ICASSP | A multi-core SoC design for advanced image and video compression. | Andreas Dehnhardt, Mark Bernd Kulaczewski, Lars Friebe, Sren Moch, Peter Pirsch, Hans-Joachim Stolberg, Carsten Reuter |
| 2005 | IGARSS | Architecture of a flexible on-board real-time SAR-processor. | Stefan Langemeyer, Christian Simon-Klar, Norman Nolte, Peter Pirsch |
| 2004 | IGARSS | Next generation on-board SAR processor for compact airborne systems. | Norman Nolte, Christian Simon-Klar, Stefan Langemeyer, Martin Kirscht, Peter Pirsch |
| 2003 | DATE | HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications. | Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sren Moch, Sebastian Flgel, Xun Mao, Mark Bernd Kulaczewski, Heiko Klumann, Peter Pirsch |
| 2003 | ICIP | HiBRID-SoC: a multi-core architecture for image and video applications. | Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sren Moch, Sebastian Flgel, Mark Bernd Kulaczewski, Peter Pirsch |
| 2003 | IGARSS | A compact and flexible multi-DSP system for real-time SAR applications. | Stefan Langemeyer, Helge Kloos, Christian Simon-Klar, Lars Friebe, Willm Hinrichs, Hanno Lieske, Peter Pirsch |
| 2002 | ICASSP | HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications. | Helge Kloos, Jens Peter Wittenburg, Willm Hinrichs, Hanno Lieske, Lars Friebe, C. Klar, Peter Pirsch |
| 2002 | IGARSS | A multi DSP board for real time SAR processing using the HiPAR-DSP 16. | Christian Simon-Klar, Lars Friebe, Helge Kloos, Hanno Lieske, Willm Hinrichs, Peter Pirsch |
| 2002 | VCIP | Highly efficient simulation environment for HDTV video decoder in VLSI design. | Xun Mao, Wei Wang, Huimin Gong, Yan L. He, Jian Lou, Lu Yu, Qingdong Yao, Peter Pirsch |
| 2002 | RSP | Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications. | Javier Martn-Langerwerf, Carsten Reuter, Holger Kropp, Peter Pirsch |
| 2001 | ICASSP | A programmable co-porcessor for MPEG-4 video. | Mladen Berekovic, Hans-Joachim Stolberg, Peter Pirsch, Holger Runge |
| 2000 | ISCAS | Co-processor architecture for MPEG-4 main profile visual compositing. | Mladen Berekovic, Peter Pirsch, Thorsten Selinger, Kai-Immo Wels, Carolina Miro, Anne Lafage, Christoph Heer, Giovanni Ghigo |
| 2000 | ISCAS | The M-PIRE MPEG-4 codec DSP and its macroblock engine. | Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch, Holger Runge, Henning Mller, Johannes Kneip |
| 1999 | FPL | An FPGA-based Prototyping System for Real-Time Verification of Video Processing Schemes. | Holger Kropp, Carsten Reuter, Matthias Wiege, Tien-Toan Do, Peter Pirsch |
| 1999 | ISCAS | Architecture of a hardware module for MPEG-4 shape decoding. | Mladen Berekovic, K. Jacob, Peter Pirsch |
| 1998 | CGI | An Array Processor Architecture with Parallel Data Cache for Image Rendering and Compositing. | Mladen Berekovic, Peter Pirsch |
| 1998 | DAC | A Video Signal Processor for MIMD Multiprocessing. | Jrg Hilgenstock, Klaus Herrmann, Jan Otterstedt, Dirk Niggemeyer, Peter Pirsch |
| 1998 | DAC | Realization of a Programmable Parallel DSP for High Performance Image Processing Applications. | Jens Peter Wittenburg, Willm Hinrichs, Johannes Kneip, Martin Ohmacht, Mladen Berekovic, Hanno Lieske, Helge Kloos, Peter Pirsch |
| 1998 | FPL | A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAs. | Tien-Toan Do, Holger Kropp, Carsten Reuter, Peter Pirsch |
| 1998 | ICASSP | A flexible processor architecture for MPEG-4 image compositing. | Mladen Berekovic, Rainer Frase, Peter Pirsch |
| 1998 | RSP | The Video and Image Processing Emulation System VIPES. | Holger Kropp, Carsten Reuter, Peter Pirsch |
| 1997 | FPL | Implementation of pipelined multipliers on Xilinx FPGAs. | Tien-Toan Do, Holger Kropp, Markus Schwiegershausen, Peter Pirsch |
| 1997 | MMSP | An algorithm-hardware-system approach to VLIW multimedia processors. | Johannes Kneip, Mladen Berekovic, Peter Pirsch |
| 1996 | ICASSP | A CAD tool for the optimization of video signal processor architectures. | Holger Kropp, Markus Schwiegershausen, Peter Pirsch |
| 1995 | ISCAS | Parallelization Resources of Image Processing Algorithms and Their Mapping on a Programmable Parallel Videosignal Processor. | Peter Pirsch, Johannes Kneip, Karsten Rnner |
| 1995 | ISCAS | Architecture and Memory Requirements for Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Synchronous DRAMs. | Marco Winzker, Peter Pirsch, Jochen Reimers |
| 1994 | ICASSP | A hierarchical multiprocessor architecture based on heterogeneous processors for video coding applications. | Winfried Gehrke, Richard Hoffer, Peter Pirsch |
| 1993 | ICASSP | Compact hardware realization for Hough based extraction of line segments in image sequences for vehicle guidance. | Jrg Schnfeld, Peter Pirsch |
| 1993 | ISCAS | A Fault-tolerant DCT-Architecture Based on Distributed Arithmetic. | Klaus Gaedke, Jens Franzen, Peter Pirsch |
| 1993 | ISCAS | A Hierarchical Multiprocessor Achitecture for Video Coding Applications. | Peter Pirsch, Winfried Gehrke, Richard Hoffer |
| 1991 | CCC | Synthesis of intermediate memories for the data supply to processor arrays. | Mirjam Schnfeld, Markus Schwiegershausen, Peter Pirsch |
| 1990 | VCIP | VLSI components for a 560-Mbit/s HDTV codec. | Klaus Grger, Peter Pirsch, Josef Kraus, Jochen Reimers |
| 1989 | ICASSP | VLSI architectures for block matching algorithms. | Thomas Komarek, Peter Pirsch |