Pierre-Emmanuel Gaillardon
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
72
Venues
12
Active years
2011–2026
Best venue rank
A*
Where they publish
Papers
72 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DATE | Special Day - A Design Blueprint for Scalable Multi-Agent Architectures in Complex EDA Workflows. | Valerio Tenace, Pierre-Emmanuel Gaillardon |
| 2025 | DATE | EDA-Aware RTL Generation with Large Language Models. | Mubashir ul Islam, Humza Sami, Pierre-Emmanuel Gaillardon, Valerio Tenace |
| 2025 | DATE | OpenMFDA: Microfluidic Design Automation in Three Dimensions. | Ashton Snelgrove, Daniel Wakeham, Skylar Stockham, Scott Temple, Pierre-Emmanuel Gaillardon |
| 2023 | FPGA | Open-source and FPGAs: Hardware, Software, Both or None? | Dana How, Tim Ansell, Vaughn Betz, Chris Lavin, Ted Speers, Pierre-Emmanuel Gaillardon |
| 2022 | DAC | Improving LUT-based optimization for ASICs. | Walter Lau Neto, Luca G. Amar, Vinicius Possani, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon |
| 2022 | DAC | ALICE: an automatic design flow for eFPGA redaction. | Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Xifan Tang, Pierre-Emmanuel Gaillardon, Ramesh Karri, Christian Pilato |
| 2022 | DDECS | Programmable logic elements using multigate ambipolar transistors. | Ashton Snelgrove, Pierre-Emmanuel Gaillardon |
| 2022 | ISCAS | An Open-source Three-Independent-Gate FET Standard Cell Library for Mixed Logic Synthesis. | Roman Gauchi, Ashton Snelgrove, Pierre-Emmanuel Gaillardon |
| 2021 | ASPDAC | Read your Circuit: Leveraging Word Embedding to Guide Logic Optimization. | Walter Lau Neto, Matheus Trevisan Moreira, Luca G. Amar, Cunxi Yu, Pierre-Emmanuel Gaillardon |
| 2021 | DAC | SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping. | Walter Lau Neto, Matheus T. Moreira, Yingjie Li, Luca G. Amar, Cunxi Yu, Pierre-Emmanuel Gaillardon |
| 2021 | DAC | Invited: Getting the Most out of your Circuits with Heterogeneous Logic Synthesis. | Scott Temple, Walter Lau Neto, Ashton Snelgrove, Xifan Tang, Pierre-Emmanuel Gaillardon |
| 2021 | DATE | A Deep Learning Approach to Sensor Fusion Inference at the Edge. | Thomas Becnel, Pierre-Emmanuel Gaillardon |
| 2021 | DATE | Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. | Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa, Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jnata Tyska Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee |
| 2021 | FPL | Taping out an FPGA in 24 hours with OpenFPGA: The SOFA Project. | Xifan Tang, Ganesh Gore, Grant Brown, Pierre-Emmanuel Gaillardon |
| 2021 | ICCAD | Exploring eFPGA-based Redaction for IP Protection. | Jitendra Bhandari, Abdul Khader Thalakkattu Moosa, Benjamin Tan, Christian Pilato, Ganesh Gore, Xifan Tang, Scott Temple, Pierre-Emmanuel Gaillardon, Ramesh Karri |
| 2021 | ISCAS | Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs. | Aurlien Alacchi, Edouard Giacomin, Xifan Tang, Pierre-Emmanuel Gaillardon |
| 2021 | ISCAS | Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow. | Edouard Giacomin, Francky Catthoor, Pierre-Emmanuel Gaillardon |
| 2020 | DATE | A Scalable Mixed Synthesis Framework for Heterogeneous Networks. | Max Austin, Scott Temple, Walter Lau Neto, Luca G. Amar, Xifan Tang, Pierre-Emmanuel Gaillardon |
| 2020 | DATE | A Novel TIGFET-based DFF Design for Improved Resilience to Power Side-Channel Attacks. | Mohammad Mehdi Sharifi, Ramin Rajaei, Patsy Cadareanu, Pierre-Emmanuel Gaillardon, Yier Jin, Michael T. Niemier, Xiaobo Sharon Hu |
| 2020 | DATE | A RRAM-based FPGA for Energy-efficient Edge Computing. | Xifan Tang, Edouard Giacomin, Patsy Cadareanu, Ganesh Gore, Pierre-Emmanuel Gaillardon |
| 2020 | ISCA | SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks. | Surya Narayanan, Karl Taht, Rajeev Balasubramonian, Edouard Giacomin, Pierre-Emmanuel Gaillardon |
| 2019 | DATE | Rebooting Our Computing Models. | Patsy Cadareanu, N. Reddy C, Carmen G. Almudver, A. Khanna, Arijit Raychowdhury, Suman Datta, Koen Bertels, Vijayakrishan Narayanan, Massimiliano Di Ventra, Pierre-Emmanuel Gaillardon |
| 2019 | DATE | Scalable Boolean Methods in a Modern Synthesis Flow. | Eleonora Testa, Luca G. Amar, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2019 | FPL | OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs. | Xifan Tang, Edouard Giacomin, Aurlien Alacchi, Baudouin Chauviere, Pierre-Emmanuel Gaillardon |
| 2019 | ICCAD | LSOracle: a Logic Synthesis Framework Driven by Artificial Intelligence: Invited Paper. | Walter Lau Neto, Max Austin, Scott Temple, Luca G. Amar, Xifan Tang, Pierre-Emmanuel Gaillardon |
| 2019 | MICRO | Wire-Aware Architecture and Dataflow for CNN Accelerators. | Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon |
| 2019 | MICRO | GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment. | Anirban Nag, C. N. Ramachandra, Rajeev Balasubramonian, Ryan Stutsman, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon |
| 2018 | DATE | Towards high-performance polarity-controllable FETs with 2D materials. | Giovanni V. Resta, Jorge Romero Gonzalez, Yashwanth Balaji, Tarun Agarwal, Dennis Lin, Francky Catthoor, Iuliana P. Radu, Giovanni De Micheli, Pierre-Emmanuel Gaillardon |
| 2018 | DATE | Practical challenges in delivering the promises of real processing-in-memory machines. | Nishil Talati, Ameer Haj Ali, Rotem Ben Hur, Nimrod Wald, Ronny Ronen, Pierre-Emmanuel Gaillardon, Shahar Kvatinsky |
| 2018 | ICCAD | Emerging reconfigurable nanotechnologies: can they support future electronics? | Shubham Rai, Srivatsa Rangachar Srinivasa, Patsy Cadareanu, Xunzhao Yin, Xiaobo Sharon Hu, Pierre-Emmanuel Gaillardon, Vijaykrishnan Narayanan, Akash Kumar |
| 2017 | ASPDAC | Multi-level logic benchmarks: An exactness study. | Luca Gaetano Amar, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2017 | ASPDAC | A novel basis for logic rewriting. | Winston Haaswijk, Mathias Soeken, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2017 | DATE | Endurance management for resistive Logic-In-Memory computing architectures. | Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Rolf Drechsler |
| 2017 | DATE | Wave pipelining for majority-based beyond-CMOS technologies. | Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amar, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins |
| 2017 | ICCAD | Enabling exact delay synthesis. | Luca Gaetano Amar, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli |
| 2017 | ISCAS | Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop. | Mahesh Nataraj, Alexandre Levisse, Bastien Giraud, Jean-Philippe Nol, Pascal Andreas Meinerzhagen, Jean-Michel Portal, Pierre-Emmanuel Gaillardon |
| 2017 | ISCAS | An efficient electronic measurement interface for memristive biosensors. | Sebastien Naus, Ioulia Tzouvadaki, Pierre-Emmanuel Gaillardon, Armando Biscontini, Giovanni De Micheli, Sandro Carrara |
| 2017 | ISCAS | RM3 based logic synthesis (Special session paper). | Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2016 | ASPDAC | Majority-based synthesis for nanotechnologies. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2016 | DAC | An MIG-based compiler for programmable logic-in-memory architectures. | Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Rolf Drechsler, Giovanni De Micheli |
| 2016 | DATE | Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Robert Wille, Giovanni De Micheli |
| 2016 | DATE | The Programmable Logic-in-Memory (PLiM) computer. | Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli |
| 2016 | DATE | Fast logic synthesis for RRAM-based in-memory computing using Majority-Inverter Graphs. | Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Rolf Drechsler |
| 2016 | DATE | Optimizing Majority-Inverter Graphs with functional hashing. | Mathias Soeken, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2016 | FPGA | A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only). | Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2016 | ISCAS | Digital, analog and RF design opportunities of three-independent-gate transistors. | Pierre-Emmanuel Gaillardon, Mehdi Hasan, Anirban Saha, Luca Gaetano Amar, Ross Walker, Berardi Sensale Rodriguez |
| 2015 | ASPDAC | Multiple Independent Gate FETs: How many gates do we need? | Luca Gaetano Amar, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli |
| 2015 | DATE | A ultra-low-power FPGA based on monolithically integrated RRAMs. | Pierre-Emmanuel Gaillardon, Xifan Tang, Jury Sandrini, Maxime Thammasack, Somayyeh Rahimian Omam, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli |
| 2015 | DATE | Fault modeling in controllable polarity silicon nanowire circuits. | Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2015 | FPGA | Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only). | Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amar, Giovanni De Micheli |
| 2015 | FPL | Accurate power analysis for near-Vt RRAM-based FPGA. | Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2015 | ICCD | Reliable and high performance STT-MRAM architectures based on controllable-polarity devices. | Kaveh Shamsi, Yu Bi, Yier Jin, Pierre-Emmanuel Gaillardon, Michael T. Niemier, Xiaobo Sharon Hu |
| 2015 | ICCD | FPGA-SPICE: A simulation-based power estimation framework for FPGAs. | Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2014 | ASPDAC | Data compression via logic synthesis. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Andreas Burg, Giovanni De Micheli |
| 2014 | DAC | Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2014 | DATE | An efficient manipulation package for Biconditional Binary Decision Diagrams. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2014 | DATE | Advanced system on a chip design based on controllable-polarity FETs. | Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Jian Zhang, Giovanni De Micheli |
| 2014 | DSD | Majority Logic Synthesis for Spin Wave Technology. | Odysseas Zografos, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli |
| 2014 | FPGA | A new basic logic structure for data-path computation (abstract only). | Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Giovanni De Micheli |
| 2014 | FPL | Pattern-based FPGA logic block and clustering algorithm. | Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2014 | ISCAS | TSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETs. | Xifan Tang, Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2014 | ISCAS | Novel grid-based power routing scheme for regular controllable-polarity FET arrangements. | Odysseas Zografos, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2013 | ASPDAC | MIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2013 | DAC | BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2013 | DAC | Towards structured ASICs using polarity-tunable Si nanowire transistors. | Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amar, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli |
| 2013 | DATE | Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits. | Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2013 | DATE | Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. | Pierre-Emmanuel Gaillardon, Luca Gaetano Amar, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli |
| 2013 | ISCAS | 3.5-D integration: A case study. | Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Ciprian Seiculescu, Vasilis F. Pavlidis, Giovanni De Micheli |
| 2013 | ISCAS | Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET. | Ogun Turkyilmaz, Fabien Clermidy, Luca Gaetano Amar, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2013 | ISCAS | Dual-threshold-voltage configurable circuits with three-independent-gate silicon nanowire FETs. | Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli |
| 2011 | DAC | Can we go towards true 3-D architectures? | Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Paul-Henry Morel, Jean-Philippe Nol, Fabien Clermidy, Ian O'Connor |
| 2011 | ISCAS | Evaluation of a crossbar multiplexer in a lithography-based nanowire technology. | Pierre-Emmanuel Gaillardon, M. Haykel Ben Jamaa, Fabien Clermidy, Ian O'Connor |