Praveen Venkataramani
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2013–2013
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | ITC | ATE test time reduction using asynchronous clock period. | Praveen Venkataramani, Vishwani D. Agrawal |
| 2013 | VLSID | Reducing Test Time of Power Constrained Test by Optimal Selection of Supply Voltage. | Praveen Venkataramani, Vishwani D. Agrawal |
| 2013 | VTS | Finding best voltage and frequency to shorten power-constrained test time. | Praveen Venkataramani, Suraj Sindia, Vishwani D. Agrawal |