| 2025 | ITC | IC-PEPR: PEPR Testing Goes Intra-Cell. | Chris Nigh, Ruben Purdy, Wei Li, Subhasish Mitra, R. D. (Shawn) Blanton |
| 2023 | DAC | Global Floorplanning via Semidefinite Programming. | Wei Li, Fangzhou Wang, Jos M. F. Moura, R. D. (Shawn) Blanton |
| 2019 | DAC | FLightNNs: Lightweight Quantized Deep Neural Networks for Fast and Accurate Inference. | Ruizhou Ding, Zeye Liu, Ting-Wu Chin, Diana Marculescu, R. D. (Shawn) Blanton |
| 2019 | ITC | Characterization of Locked Combinational Circuits via ATPG. | Danielle Duvalsaint, Xiaoxiao Jin, Benjamin Niewenhuis, R. D. (Shawn) Blanton |
| 2019 | ITC | Improving Test Chip Design Efficiency via Machine Learning. | Zeye Liu, Qicheng Huang, Chenlei Fang, R. D. (Shawn) Blanton |
| 2018 | ASPDAC | Quantized deep neural networks for energy efficient hardware-based inference. | Ruizhou Ding, Zeye Liu, R. D. (Shawn) Blanton, Diana Marculescu |
| 2018 | ETS | Detection of IJTAG attacks using LDPC-based feature reduction and machine learning. | Xuanle Ren, R. D. (Shawn) Blanton, Vtor Grade Tavares |
| 2018 | VTS | NOIDA: Noise-resistant Intra-cell Diagnosis. | Soumya Mittal, R. D. (Shawn) Blanton |
| 2017 | ETS | Multiple-defect diagnosis for Logic Characterization Vehicles. | Ben Niewenhuis, Soumya Mittal, R. D. (Shawn) Blanton |
| 2017 | VTS | Test-set reordering for improving diagnosability. | Cheng Xue, R. D. (Shawn) Blanton |
| 2016 | DATE | Achieving 100% cell-aware coverage by design. | Zeye Liu, Ben Niewenhuis, Soumya Mittal, R. D. (Shawn) Blanton |
| 2016 | ITC | Logic characterization vehicle design reflection via layout rewiring. | Phillip Fynan, Zeye Liu, Benjamin Niewenhuis, Soumya Mittal, Marcin Strajwas, R. D. (Shawn) Blanton |
| 2016 | ITC | Test chip design for optimal cell-aware diagnosability. | Soumya Mittal, Zeye Liu, Ben Niewenhuis, R. D. (Shawn) Blanton |
| 2015 | DATE | Detection of illegitimate access to JTAG via statistical learning in chip. | Xuanle Ren, Vtor Grade Tavares, R. D. (Shawn) Blanton |
| 2015 | ICCD | A one-pass test-selection method for maximizing test coverage. | Cheng Xue, R. D. (Shawn) Blanton |
| 2015 | ITC | Design reflection for optimal test-chip implementation. | R. D. (Shawn) Blanton, Benjamin Niewenhuis, Zeye (Dexter) Liu |
| 2012 | ITC | On-chip diagnosis for early-life and wear-out failures. | Matthew Beckler, R. D. (Shawn) Blanton |
| 2011 | DAC | To DFM or not to DFM? | Wing Chiu Tam, R. D. (Shawn) Blanton |
| 2011 | ICCAD | Statistical defect-detection analysis of test sets using readily-available tester data. | Xiaochun Yu, R. D. (Shawn) Blanton |
| 2011 | ITC | Physically-aware analysis of systematic defects in integrated circuits. | Wing Chiu Tam, R. D. (Shawn) Blanton |
| 2010 | VTS | Evaluating yield and testing impact of sub-wavelength lithography. | Wing Chiu Tam, R. D. (Shawn) Blanton, Wojciech Maly |
| 2009 | DAC | Automated failure population creation for validating integrated circuit diagnosis methods. | Wing Chiu Tam, Osei Poku, R. D. (Shawn) Blanton |
| 2009 | ICCAD | Virtual probe: A statistically optimal framework for minimum-cost silicon characterization of nanoscale integrated circuits. | Xin Li, Rob A. Rutenbar, R. D. (Shawn) Blanton |
| 2008 | DAC | Precise failure localization using automated layout analysis of diagnosis candidates. | Wing Chiu Tam, Osei Poku, R. D. (Shawn) Blanton |
| 2008 | DAC | Multiple defect diagnosis using no assumptions on failing pattern characteristics. | Xiaochun Yu, R. D. (Shawn) Blanton |
| 2008 | VTS | Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data. | Sounil Biswas, R. D. (Shawn) Blanton |
| 2006 | DAC | Multiple-detect ATPG based on physical neighborhoods. | Jeffrey E. Nelson, Jason G. Brown, Rao Desineni, R. D. (Shawn) Blanton |
| 2006 | DATE | Extraction of defect density and size distributions from wafer sort test results. | Jeffrey E. Nelson, Thomas Zanon, Rao Desineni, Jason G. Brown, N. Patil, Wojciech Maly, R. D. (Shawn) Blanton |
| 2006 | VTS | Exploiting Regularity for Inductive Fault Analysis. | Jason G. Brown, R. D. (Shawn) Blanton |
| 2005 | DATE | Specification Test Compaction for Analog Circuits and MEMS. | Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi |
| 2005 | VLSID | Testing Nanometer Digital Integration Circuits: Myths, Reality and the Road Ahead. | R. D. (Shawn) Blanton, Subhasish Mitra |
| 2005 | VTS | Diagnosis of Arbitrary Defects Using Neighborhood Function Extraction. | Rao Desineni, R. D. (Shawn) Blanton |
| 2004 | ITC | CAEN-BIST: Testing the NanoFabric. | Jason G. Brown, R. D. (Shawn) Blanton |
| 2004 | ITC | Benchmarking Diagnosis Algorithms With a Diverse Set of IC Deformations. | Thomas J. Vogels, Thomas Zanon, Rao Desineni, R. D. (Shawn) Blanton, Wojciech Maly, Jason G. Brown, Jeffrey E. Nelson, Y. Fei, X. Huang, Padmini Gopalakrishnan, Mahim Mishra, Vyacheslav Rovner, S. Tiwary |
| 2004 | VTS | Generalized Sensitization using Fault Tuples. | Sounil Biswas, Kumar N. Dwarakanath, R. D. (Shawn) Blanton |
| 2004 | VTS | Multi-Modal Built-In Self-Test for Symmetric Microsystems. | Nilmoni Deb, R. D. (Shawn) Blanton |
| 2003 | ICCAD | ATPG for Noise-Induced Switch Failures in Domino Logic. | Rahul Kundu, R. D. (Shawn) Blanton |
| 2003 | ITC | Analyzing the Effectiveness of Multiple-Detect Test Sets. | R. D. (Shawn) Blanton, Kumar N. Dwarakanath, Anirudh B. Shah |
| 2003 | ITC | Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk. | Rahul Kundu, R. D. (Shawn) Blanton |
| 2003 | ITC | Deformations of IC Structure in Test and Yield Learning. | Wojciech Maly, Anne E. Gattiker, Thomas Zanon, Thomas J. Vogels, R. D. (Shawn) Blanton, Thomas M. Storey |
| 2003 | ITC | Progressive Bridge Identification. | Thomas J. Vogels, Wojciech Maly, R. D. (Shawn) Blanton |
| 2002 | ITC | Built-In Self Test of CMOS-MEMS Accelerometers. | Nilmoni Deb, R. D. (Shawn) Blanton |
| 2002 | VTS | Exploiting Dominance and Equivalence using Fault Tuples. | Kumar N. Dwarakanath, R. D. (Shawn) Blanton |
| 2002 | VTS | Timed Test Generation Crosstalk Switch Failures in Domino CMOS Circuits. | Rahul Kundu, R. D. (Shawn) Blanton |
| 2002 | VTS | SoCs with MEMS? Can We Include MEMS in the SoCs Design and Test Flow? | Salvador Mir, H. Bederr, R. D. (Shawn) Blanton, Hans G. Kerkhoff, H. J. Klim |
| 2001 | VTS | Testing of Dynamic Logic Circuits Based on Charge Sharing. | Keerthi Heragu, Manish Sharma, Rahul Kundu, R. D. (Shawn) Blanton |
| 1999 | VLSID | IDDQ-Testability of Tree Circuits. | R. D. (Shawn) Blanton |
| 1999 | VLSID | Superscalar Processor Validation at the Microarchitecture Level. | Noppanunt Utamaphethai, R. D. (Shawn) Blanton, John Paul Shen |
| 1998 | ICCD | Using regression analysis for GA-based ATPG parameter optimization. | William E. Dougherty, R. D. (Shawn) Blanton |
| 1996 | VTS | Design of a fast, easily testable ALU. | R. D. (Shawn) Blanton, John P. Hayes |