Skip to content

Rosa Rodrguez-Montas

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

24

Venues

7

Active years

1991–2017

Best venue rank

B

Where they publish

Papers

24 indexed papers, newest first.

YearVenueTitleAuthors
2017ETSMitigating read & write errors in STT-MRAM memories under DVS.Elena-Ioana Vatajelu, Rosa Rodrguez-Montas, Michel Renovell, Joan Figueras
2015DATERead/write robustness estimation metrics for spin transfer torque (STT) MRAM cell.Elena I. Vatajelu, Rosa Rodrguez-Montas, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras
2015ETSPower-aware voltage tuning for STT-MRAM reliability.Elena I. Vatajelu, Rosa Rodrguez-Montas, Stefano Di Carlo, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras
2014ETSPost-bond test of Through-Silicon Vias with open defects.Rosa Rodrguez-Montas, Daniel Arum, Joan Figueras
2014IOLTSPre-bond testing of weak defects in TSVs.Daniel Arum, Rosa Rodrguez-Montas, Joan Figueras
2013ETSBIST architecture to detect defects in tsvs during pre-bond testing.Daniel Arum, Rosa Rodrguez-Montas, Joan Figueras
2010ETSDiagnosis of full open defects in interconnect lines with fan-out.Rosa Rodrguez-Montas, Daniel Arum, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman
2008ITCTime-dependent Behaviour of Full Open Defects in Interconnect Lines.Rosa Rodrguez-Montas, Daniel Arum, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman
2008VTSFull Open Defects in Nanometric CMOS.Daniel Arum, Rosa Rodrguez-Montas, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman
2007VTSDiagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages.Daniel Arum, Rosa Rodrguez-Montas, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi
2007VTSDiagnosis of Full Open Defects in Interconnecting Lines.Rosa Rodrguez-Montas, Daniel Arum, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi
2006DDECSLissajous Based Mixed-Signal Testing for N-Observable Signals.Luz Balado, Emili Lupon, L. Garca, Rosa Rodrguez-Montas, Joan Figueras
2005ETSDefective behaviours of resistive opens in interconnect lines.Daniel Arum, Rosa Rodrguez-Montas, Joan Figueras
2004VTSBIST Technique by Equally Spaced Test Vector Sequences.Salvador Manich, L. Garca, Luz Balado, Emili Lupon, Josep Rius, Rosa Rodrguez-Montas, Joan Figueras
2003DSNA Combinatorial Method for the Evaluation of Yield of Fault-Tolerant Systems-on-Chip.Doru P. Munteanu, Vctor Su, Rosa Rodrguez-Montas, Juan A. Carrasco
2003ETSProcess-variability aware delay fault testing of ΔVDaniel Arum-Delgado, Rosa Rodrguez-Montas, Jos Pineda de Gyvez, Guido Gronthoud
2003ETSOn the selection of efficient arithmetic additive test pattern generators [logic test].Salvador Manich, L. Garca, Luz Balado, Emili Lupon, Josep Rius, Rosa Rodrguez-Montas, Joan Figueras
2003VTSThreshold Voltage Mismatch (DeltaVT) Fault Modeling.Jos Pineda de Gyvez, Rosa Rodrguez-Montas
2002IOLTSAnalog Switches in Programmable Analog Devices: Quiescent Defective Behaviours.Rosa Rodrguez-Montas, D. Muoz, Luz Balado, Joan Figueras
2002ITCRTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST.Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira, Salvador Manich, Rosa Rodrguez-Montas, Joan Figueras
1998DATEEstimation of the Defective IDDQ Caused by Shorts in Deep-Submicron CMOS ICs.Rosa Rodrguez-Montas, Joan Figueras
1997VTSBridges in sequential CMOS circuits: current-voltage signatur.Rosa Rodrguez-Montas, Joan Figueras
1992ITCBridging Defects Resistance Measurements in a CMOS Process.Rosa Rodrguez-Montas, Joan Figueras, Eric Bruls
1991ITCCurrent vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS.Rosa Rodrguez-Montas, Jaume A. Segura, Vctor H. Champac, Joan Figueras, J. A. Rubio