| 2025 | ITC | Chasing Front-End-Of-Line Defects with Cell-Aware Diagnostics in High-Volume Manufacturing. | Saghir A. Shaikh, Brandon Brea, Gaurav Devrani, Muhammad Waheed, Lay Hoon Loh, Prakash Palanisamy, Jim Lee, Giyoung Yang |
| 2025 | VTS | Innovation Practices Track: Frontiers in Diagnosis and Debug. | Suriyaprakash Natarajan, Saghir A. Shaikh, Wu-Tung Cheng, Sankaran Menon |
| 2016 | ETS | Practices in High-Speed IO testing. | Salem Abdennadher, Saghir A. Shaikh |
| 2014 | ITC | Fast BIST of I/O Pin AC specifications and inter-chip delays. | Stephen Sunter, Saghir A. Shaikh, Qing Lin |
| 2013 | VTS | Innovative practices session 3C: Harnessing the challenges of testability and debug of high speed I/Os. | Saghir A. Shaikh |
| 2011 | VTS | Test and characterization of high-speed circuits. | Saghir A. Shaikh |
| 2004 | ITC | IEEE Std 1149.6 Implementation for a XAUI-to-Serial 10-Gbps Transceiver. | Saghir A. Shaikh |
| 2001 | ITC | Test response compression and bitmap encoding for embedded memories in manufacturing process monitoring. | John T. Chen, Jitendra Khare, Ken Walker, Saghir A. Shaikh, Janusz Rajski, Wojciech Maly |
| 2000 | VLSID | Maximizing Wafer Productivity Through Layout Optimization. | Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, Saghir A. Shaikh, Manuel d'Abreu |
| 2000 | VLSID | Manufacturability and Testability Oriented Synthesis. | Saghir A. Shaikh, Jitendra Khare, Hans T. Heineken |
| 2000 | VTS | Test and Debug of Networking SoCs: A Case Study. | A. Bommireddy, Jitendra Khare, Saghir A. Shaikh, S.-T. Su |
| 1996 | PDPTA | CON | Saghir A. Shaikh, Silvian Goldenberg, Stephen A. Szygenda |
| 1995 | ICCD | Statistics on concurrent fault and design error simulation. | Brian Grayson, Saghir A. Shaikh, Stephen A. Szygenda |