Savithri Sundareswaran
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
13
Venues
7
Active years
1999–2008
Best venue rank
A*
Where they publish
Papers
13 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | DATE | Transistor-Specific Delay Modeling for SSTA. | Brian Cline, Kaviraj Chopra, David T. Blaauw, Andres Torres, Savithri Sundareswaran |
| 2007 | DAC | On-Chip Decoupling Capacitance and P/G Wire Co-optimization for Dynamic Noise. | Min Zhao, Rajendran Panda, Ben Reschke, Yuhong Fu, Trudi Mewett, Sri Chandrasekaran, Savithri Sundareswaran, Shu Yan |
| 2007 | ICCAD | A novel technique for incremental analysis of on-chip power distribution networks. | Yuhong Fu, Rajendran Panda, Ben Reschke, Savithri Sundareswaran, Min Zhao |
| 2007 | ITC | Analyzing the risk of timing modeling based on path delay tests. | Pouria Bastani, Benjamin N. Lee, Li-C. Wang, Savithri Sundareswaran, Magdy S. Abadir |
| 2006 | DAC | A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming. | Min Zhao, Rajendran Panda, Savithri Sundareswaran, Shu Yan, Yuhong Fu |
| 2004 | DAC | A stochastic approach To power grid analysis. | Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda |
| 2004 | DAC | Optimal placement of power supply pads and pins. | Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda |
| 2003 | ASPDAC | Statistical delay computation considering spatial correlations. | Aseem Agarwal, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Min Zhao, Kaushik Gala, Rajendran Panda |
| 2003 | ICCAD | Vectorless Analysis of Supply Noise Induced Delay Variation. | Sanjay Pant, David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Rajendran Panda |
| 2001 | ISLPED | On the interaction of power distribution network with substrate. | Rajendran Panda, Savithri Sundareswaran, David T. Blaauw |
| 2000 | ICCAD | Slope Propagation in Static Timing Analysis. | David T. Blaauw, Vladimir Zolotov, Savithri Sundareswaran, Chanhee Oh, Rajendran Panda |
| 2000 | VLSID | An Assertion Based Technique for Transistor Level Dynamic Power Estimation. | Savithri Sundareswaran, R. Venkatesan, S. Bhaskar |
| 1999 | VLSID | A Three-Tier Assertion Technique for Spice Verification of Transistor Level Timing Analysis. | Savithri Sundareswaran, David T. Blaauw, Abhijit Dharchoudhury |