| 2025 | ETS | Self-Aware Silicon: Enhancing Lifecycle Management with Intelligent Testing and Data Insights. | Fabian Vargas, Marko S. Andjelkovic, Milos Krstic, Anirban Kar, Swati Deshwal, Yogesh Singh Chauhan, Hussam Amrouch, Daniel Tille, Sebastian Huhn |
| 2025 | ITC | Holistic Validation Pattern Generation for IEEE 1687 and Streaming Scan Networks. | Sebastian Huhn, Matthias Kampmann, Jan Burchard, Reinhard Meier, Kacper Czerniawski, Lori Schramm, Sandipan Sharma, Nikita Naresh, Wilson Pradeep, Prachi Sinha, Mayank Parasrampuria, Jonathan Gaudet, Martin Keim |
| 2024 | ETS | A Multi-Objective Evolutionary Approach for Test Network Design. | Payam Habiby, Fatemeh Shirinzadeh, Sebastian Huhn, Rolf Drechsler |
| 2023 | DATE | Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors. | Jens Trommer, Niladri Bhattacharjee, Thomas Mikolajick, Sebastian Huhn, Marcel Merten, Mohammed E. Djeridane, Muhammad Hassan, Rolf Drechsler, Shubham Rai, Nima Kavand, Armin Darjani, Akash Kumar, Violetta Sessi, M. Drescher, S. Kolodinski, M. Wiatr |
| 2023 | ETS | Synthesis of IJTAG Networks for Multi-Power Domain Systems on Chips. | Payam Habiby, Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich, Sebastian Huhn, Rolf Drechsler |
| 2023 | ETS | Increasing SAT-Resilience of Logic Locking Mechanisms using Formal Methods. | Marcel Merten, Sebastian Huhn, Rolf Drechsler |
| 2023 | VTS | A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin. | Daniel Tille, Leon Klimasch, Sebastian Huhn |
| 2022 | ETS | Quality Assessment of RFET-based Logic Locking Protection Mechanisms using Formal Methods. | Marcel Merten, Sebastian Huhn, Rolf Drechsler |
| 2022 | ITC | Next Generation Design For Testability, Debug and Reliability Using Formal Techniques. | Sebastian Huhn, Rolf Drechsler |
| 2022 | VTS | A Hardware-based Evolutionary Algorithm with Multi-Objective Optimization Operators for On-Chip Transient Fault Detection. | Marcel Merten, Sebastian Huhn, Rolf Drechsler |
| 2020 | DSD | Combining Machine Learning and Formal Techniques for Small Data Applications - A Framework to Explore New Structural Materials. | Rolf Drechsler, Sebastian Huhn, Christina Plump |
| 2019 | DSD | SAT-Hard: A Learning-Based Hardware SAT-Solver. | Buse Ustaoglu, Sebastian Huhn, Frank Sill Torres, Daniel Groe, Rolf Drechsler |
| 2019 | ETS | Hybrid Architecture for Embedded Test Compression to Process Rejected Test Patterns. | Sebastian Huhn, Daniel Tille, Rolf Drechsler |
| 2017 | ASPDAC | Enhancing robustness of sequential circuits using application-specific knowledge and formal methods. | Sebastian Huhn, Stefan Frehse, Robert Wille, Rolf Drechsler |
| 2017 | DATE | Optimization of retargeting for IEEE 1149.1 TAP controllers with embedded compression. | Sebastian Huhn, Stephan Eggersgl, Krishnendu Chakrabarty, Rolf Drechsler |
| 2016 | ETS | VecTHOR: Low-cost compression architecture for IEEE 1149-compliant TAP controllers. | Sebastian Huhn, Stephan Eggersgl, Rolf Drechsler |